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28 минут назад

Senior / Staff Verification Engineer - RF/TIA (Analog Mixed Signal)

Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Singapore
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Текст:
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TL;DR
Senior / Staff Verification Engineer - RF/TIA (Analog Mixed Signal) (SiGe BiCMOS/CMOS): Designing and verifying high-speed broadband analog mixed-signal ICs, including transimpedance amplifiers and photonic communication drivers, with an accent on transistor-level circuits, feedback loops, and chip-level coverage. Focus on developing verification plans and testbenches, analyzing simulation results, and debugging designs across SiGe BiCMOS and CMOS process nodes.

Location: Singapore

Company

hirify.global develops semiconductor solutions for data infrastructure across enterprise, cloud, AI, carrier, and high-speed optical communication applications.

What you will do

  • Own verification of major blocks or complete broadband ICs.
  • Develop mixed-signal design verification plans for broadband amplifiers based on architecture and specifications.
  • Create chip-level test cases and verification testbenches using industry-standard languages and methodologies.
  • Review verification results, analyze coverage, and provide feedback to design teams.
  • Collaborate with design and layout teams to identify and resolve circuit issues.
  • Document verification plans, test results, specification compliance, and design changes.

Requirements

  • BS in Electrical Engineering; an MSc in high-performance analog or mixed-signal design and verification is preferred.
  • 4–8 years of experience in analog IC design or verification.
  • Strong understanding of analog and mixed-signal circuit design and verification principles.
  • Experience with Cadence Virtuoso, Assembler, Spectre, and AMS simulators.
  • Knowledge of transistor-level design, control and feedback loop stability, AGC loops, precision analog circuits, and RF/high-speed broadband techniques.
  • Programming skills in Python; Verilog or Verilog-A experience is a plus, along with strong debugging, analytical, communication, and documentation skills.

Nice to have

  • Project experience with SiGe BiCMOS technologies.
  • Experience with Verilog or Verilog-A.

Culture & Benefits

  • Competitive compensation and benefits.
  • Collaborative, transparent, and inclusive work environment.
  • Resources and support for professional growth and development.
  • Interview use of AI tools, including transcription, answer-generation, and automated note-taking tools, is prohibited.
  • Access to export-controlled technology may require eligibility under U.S. export control laws and an export license review.

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