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1 день назад

Senior ASIC Emulation Engineer (Aerospace)

170 000 - 250 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Senior ASIC Emulation Engineer (Aerospace): Leading the bring-up, deployment, and optimization of pre-silicon emulation platforms for high-power satellite systems with an accent on hardware/software co-development and verification acceleration. Focus on building full-chip emulation models, defining methodology, and collaborating across cross-functional teams to ensure first-generation silicon success.

Location: Must be based in Seattle, WA

Salary: $170,000 – $250,000

Company

hirify.global is a Series C space startup mass-producing high-power satellite platforms for missions ranging from LEO to deep space.

What you will do

  • Build, integrate, and maintain full-chip and system-level emulation models on platforms like Palladium, ZeBu, or Veloce.
  • Define and evolve emulation strategy, methodology, and workflows across the ASIC organization.
  • Optimize RTL designs for emulation performance, capacity, and stability.
  • Develop transactors, BFMs, and virtualization interfaces to support complex system use cases.
  • Enable firmware and software teams by providing robust emulation platforms for HW/SW integration.
  • Triage failures, perform root-cause analysis, and collaborate with design and verification teams to resolve issues.

Requirements

  • Must be a U.S. Person (citizen, green card holder, or protected individual) due to ITAR regulations.
  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of experience in ASIC/SoC development with a focus on emulation.
  • Hands-on expertise with major emulation platforms (Palladium, ZeBu, Veloce).
  • Solid understanding of SystemVerilog, digital logic, RTL flows, and DV methodologies.
  • Proficiency in scripting languages (Python, Perl, TCL) and C/C++ for system-level testing.

Nice to have

  • Experience with FPGA prototyping platforms (HAPS, Protium).
  • Experience with low-power modes and power-aware emulation.
  • Experience with analog/mixed-signal behavioral models.
  • Experience with high-speed data protocols like PCIe, Ethernet, or SERDES.

Culture & Benefits

  • Comprehensive medical, dental, and vision coverage.
  • Paid time off and paid parental leave.
  • Equity participation in the company.
  • Opportunity to work on groundbreaking space technology in a fast-paced startup environment.

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