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1 день назад

Senior DFT Engineer (Aerospace)

170 000 - 250 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Senior DFT Engineer (Aerospace): Leading DFT architecture and implementation for complex mixed-signal SoCs with an accent on memory BIST, scan insertion, and ATPG strategy. Focus on ensuring high test coverage, manufacturability, and first-pass silicon success for high-power satellite platforms.

Location: Must be based in Seattle, WA (Onsite)

Salary: $170,000 – $250,000

Company

hirify.global is a Series C space startup building high-power satellite platforms for missions from LEO to deep space, backed by major investors and significant government contracts.

What you will do

  • Define and implement DFT architecture for mixed-signal SoCs, including scan, MBIST, LBIST, and boundary scan.
  • Lead RTL-level DFT insertion, scan chain optimization, and low-power DFT methodologies.
  • Develop and execute ATPG flows to generate high-quality test patterns and drive coverage closure.
  • Collaborate with RTL, DV, and PD teams to ensure clean DFT integration and timing alignment.
  • Drive DFT verification, signoff, and silicon debug activities to analyze failures and yield issues.

Requirements

  • Must be a U.S. Person as defined by ITAR regulations.
  • B.S. or M.S. in Electrical Engineering or related field.
  • 7+ years of experience in DFT for complex SoCs.
  • Strong hands-on experience with RTL DFT insertion and ATPG tools.
  • Deep understanding of scan architectures, fault models, and coverage analysis.
  • Strong debugging skills across RTL, gate-level, and silicon.

Nice to have

  • Experience with MBIST/LBIST implementation and memory repair flows.
  • Knowledge of IEEE 1149.x (JTAG/boundary scan) standards.
  • Experience with multi-voltage domain and power-aware DFT.
  • Exposure to physical design impacts on DFT.
  • Experience in high-speed interfaces (SerDes) or RF/mixed-signal SoCs.

Culture & Benefits

  • Comprehensive benefits package including medical, dental, and vision coverage.
  • Paid time off and paid parental leave.
  • Equity in the company.
  • Opportunity to work on groundbreaking space technology in a fast-paced environment.

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