PERC ESD EDA Engineer (EDA)

TL;DR

PERC ESD EDA Engineer (EDA): Developing PERC ESD rule decks for advanced hirify.global technologies with an accent on reliability requirements and design rule methodologies. Focus on automating rule checks, debugging verification flows, and solving complex ESD/LU design problems.

Location: On-site presence required in Hillsboro (OR), Phoenix (AZ), Santa Clara (CA), or Austin (TX)

Salary: $111,030 - $211,200 USD

Company

hirify.global is a global leader in semiconductor manufacturing, pushing the boundaries of AI, analytics, and cloud-to-edge technology.

What you will do

• Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements.
• Create and maintain reliability ESD and LU design rule methodologies and specifications.
• Collaborate with internal design, reliability, and CAD teams, and external EDA vendors to implement new tool features.
• Build and execute test cases for rule debugging, validation, and signoff.
• Define QA requirements and drive automation to improve the efficiency of rule checks.
• Identify and analyze ESD/LU design root causes and drive practical solutions across teams.

Requirements

• Master's degree or PhD in Electrical Engineering, Computer Engineering, or a relevant STEM degree.
• 1+ years of industry experience in physical design verification (reliability, device physics, process technology).
• 1+ years of experience with ESD PERC rule decks/runset development and debugging.
• 1+ years of experience in scripting with Python, Tcl, or Perl for QA and flow automation.

Nice to have

• Strong knowledge of ESD/LU PreSi models (HBM, CDM) and I/O design.
• Proven success working with cross-functional and cross-site teams.
• Experience driving industry-wide initiatives or task forces.
• Strong analytical, problem-solving, and leadership skills.

Culture & Benefits

• Competitive total compensation package including stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Opportunity to work on cutting-edge semiconductor technologies for the AI era.