Silicon Photonics Foundry PDK Design Engineer (Semiconductors)

TL;DR

Silicon Photonics Foundry PDK Design Engineer: Developing and maintaining PDK infrastructure and physical verification runsets for next-generation optical interconnect products with an accent on EDA tool automation and design flow optimization. Focus on architecting robust design environments, implementing DRC/LVS verification decks, and collaborating with cross-functional teams to enable foundry business growth.

Location: Must be based on-site in Albuquerque, New Mexico, USA

Salary: $149,600–$284,580 USD

Company

hirify.global is a global leader in semiconductor manufacturing, driving innovation in silicon process and packaging technology for the AI era.

What you will do

• Create, modify, and document pcell designs and physical verification runsets.
• Architect and validate software solutions for Electronic-Photonic design automation.
• Automate EDA tool flows and maintain CI/CD pipelines for hardware and software products.
• Engage with internal and external partners to define technical requirements and evaluate feasibility.
• Ensure efficient configuration and maintenance of cloud computing infrastructure for design teams.
• Lead cross-functional collaboration between layout engineers, designers, and fab process integrators.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, Applied Physics, or related field.
• Minimum 2+ years of experience in EDA software development focused on physical or layout verification.
• Proven expertise in foundry rule deck (DRC and LVS) development.
• Proficiency in industry-standard CAD tools such as Siemens Calibre or Cadence Virtuoso.
• Strong programming skills in Python, Perl, TCL, or C++.
• Must be able to work on-site in Albuquerque, New Mexico.

Nice to have

• MS or Ph.D. with 3+ years of relevant experience.
• Experience with Synopsys OptoCompiler and Virtuoso Photonic Solutions.
• Knowledge of Smart Fill decks and parasitic extraction.
• Background in VLSI circuit and CMOS layout design.
• Experience with Unix/Linux environments and version control systems.

Culture & Benefits

• Competitive total compensation package including base pay and stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Opportunity to work on cutting-edge silicon photonics and optical interconnect technology.
• Collaborative environment within a worldwide factory network.