Staff Analog Design Engineer (Semiconductors)

TL;DR

Staff Analog Design Engineer (SerDes): Designing and optimizing high-performance serial links in advanced technology nodes (3nm, 2nm) with an accent on analog circuit blocks and architecture development. Focus on signal integrity improvement, noise reduction, and the implementation of high-speed SerDes components.

Location: Singapore

Company

hirify.global provides essential semiconductor solutions for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

• Design high-speed and high-performance SerDes in advanced technology nodes (3nm, 2nm and beyond).
• Participate in SerDes Architecture Development in collaboration with DSP, Analog, and Digital design teams.
• Develop IP characterization and validation plans alongside Application Engineers.
• Provide technical support for products and customers.
• Provide detailed instructions to layout engineers to ensure design integrity.

Requirements

• PhD in Electrical Engineering or related fields.
• Expertise in designing analog circuit blocks including PLL, Data Converters, Oscillators, and high-speed SerDes blocks (CTLE, FFE, DFE, CDR, Line driver).
• Proficiency with analog design and verification tools: Virtuoso, Spectre, ADE, and post-layout extraction tools.
• Strong understanding of signal integrity, noise reduction, and Multi-GHz low-jitter clock generation.
• Experience in silicon bring-up and system-level pre-tape out analog validation.
• Must be eligible to access export-controlled information under U.S. export control laws (EAR).

Culture & Benefits

• Collaborative, transparent, and inclusive work environment.
• Competitive compensation and comprehensive benefit packages.
• Dedicated resources and tools for professional growth and development.