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3 дня назад

Senior Principal Engineer, Verification

182 360 - 273 200$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Senior Principal Engineer, Verification (Digital IC): Design, develop, implement, verify, and document micro-architecture and RTL for complex power management integrated circuits with an accent on verification methodologies and reusable IP. Focus on full design cycle from specs to silicon bring-up, collaborating with architects and verification teams, and improving design processes.

Location: Santa Clara, CA (onsite). Requires eligibility for U.S. export-controlled technology access (U.S. citizens, permanent residents, or protected individuals preferred; export license may be required).

Salary: $182,360 - $273,200 per annum

Company

hirify.global’s semiconductor solutions power data infrastructure for enterprise, cloud, AI, and carrier architectures.

What you will do

  • Design, develop, implement, verify, and document micro-architecture and RTL for power management ICs.
  • Collaborate with system and chip architects for high-quality implementations.
  • Participate end-to-end in design cycle: micro-architecture docs, RTL coding, timing specs, verification test plans, silicon bring-up, and IP maintenance.
  • Produce block uArchitecture and register specs; schedule cross-functional reviews.
  • Evaluate and improve design and verification methodologies; supervise or mentor engineers.

Requirements

  • Bachelor’s in CS/EE or related + 15+ years experience (Master’s +10-12 years, PhD +8-10 years).
  • Creating micro-architectural specs from standards/arch specs.
  • SystemVerilog RTL coding with assertions.
  • Universal Verification Methodology (UVM).
  • Modular/reusable design components; embedded micro-controller systems.
  • Multi-tasking, flexibility, project leadership.

Nice to have

  • Design for Automotive Safety (ASIL), I2C, SPI, SMBUS.
  • Mixed-signal simulation (Cadence AMS).
  • Knowledge of power conversion systems.

Culture & Benefits

  • Comprehensive benefits: financial well-being (employee stock purchase plan), family support, mental/physical health resources, recognition awards.
  • Opportunity to impact industries and innovate in semiconductor IP for major chip/tech companies.
  • Collaborative team environment in Central Engineering hub serving Automotive, Storage, Security, Networking.

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