Digital Design Engineer (FPGA)

TL;DR

Digital Design Engineer (FPGA): Design and implement complex FPGA designs targeting next-generation radar sensor products with an accent on RTL design, behavioral simulation, timing analysis, and hardware integration. Focus on system integration with software, protocol implementations, and supporting deployed capabilities for U.S. and international customers.

Location: Full-time onsite in Hawthorne, California. U.S. Person status required to access U.S.-only data systems

Salary: $160,000 - 225,000

Company

hirify.global develops advanced sensing and detection solutions powered by Coherent Distributed Networks for defense, commercial air operations, and border protection.

What you will do

• Design and implement complex FPGA designs for next-generation sensor products
• Support system integration of FPGA designs with complex software systems
• Support deployed FPGA capabilities for U.S. and international customers
• Collaborate on multiple product capabilities and expand skillset across product families

Requirements

• Bachelor’s or higher in Computer Engineering, Electrical Engineering, Computer Science or related
• 5+ years in professional FPGA RTL design
• Extensive experience with full FPGA lifecycle: RTL design, simulation, place and route, timing, integration
• Extensive Verilog and SystemVerilog development
• Extensive ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
• AMD (Xilinx) Vivado and SoC FPGAs (Zynq, Ultrascale+, Versal)
• Network Protocols (TCP/UDP/IP) and Serial Protocols (I2C, JTAG, UART, SPI, CAN)
• Bash and Python scripting, software driver modifications for validation
• Agile processes including Scrum, CI, TDD
• Ability to work independently and in small teams

Nice to have

• High-performant baseband signal processing in FPGA
• Translating algorithms from Simulink/MATLAB to RTL
• Software drivers (C/C++/Python) for FPGA interfaces
• FPGA Ethernet IP (1G/10G/40G/100G)
• Software-Defined Radios (Ettus, NI, HackRF)
• Analog Device Transceivers, Ground/Airborne Sensors (Radars, EO/IR, EW)
• Time Synchronization (NTP/PTP), HLS Synthesis (C/C++/SystemC/Chisel)
• VHDL, high-speed PCB design, DoD clearance, GPUs/AI, git, CI/CD, DoD architectures

Culture & Benefits

• Health benefits: Medical, dental, vision 100% company-paid
• 401k with 50% match up to 6% of pay, FSA, HSA, life insurance
• Free daily lunch, no-meeting Fridays, unlimited PTO, casual dress
• Competitive base, pre-IPO stock options, relocation assistance, future bonuses
• 200 employees across 5 global offices with team growth