Назад
Company hidden
обновлено 4 часа назад

Senior Pre-Silicon SoC Modeling Engineer (AI)

168 100 - 261 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Senior Pre-Silicon SoC Modeling Engineer (AI): Building C++ models of custom SoCs for machine learning accelerators, impacting chip design, verification, and production with an accent on translating architecture specs and RTL behavior into accurate, testable models. Focus on pre-silicon verification flows, debugging discrepancies, and improving modeling methodology.

Location: Cupertino, CA or Austin, TX

Salary: USA, CA, Cupertino - 193,300.00 - 261,500.00 USD annually; USA, TX, Austin - 168,100.00 - 227,400.00 USD annually

Company

hirify.global's Trainium and Inferentia chips power the world's largest machine learning clusters.

What you will do

  • Build and own models of SoC subsystems, translating architecture specs and RTL behavior into accurate, testable C++ models.
  • Work directly with RTL design and verification teams to validate model behavior against RTL and debug discrepancies.
  • Develop model-based test infrastructure, including regression suites and RTL correlation checks.
  • Contribute to performance modeling efforts, building cycle-approximate models to evaluate design trade-offs.
  • Improve modeling methodology and infrastructure for model structure, integration, and testing.
  • Collaborate with chip architects to understand upcoming designs and plan modeling work.

Requirements

  • 6+ years of full software development life cycle experience.
  • 6+ years of experience writing functional or performance models of hardware (SoCs, ASICs, GPUs, CPUs, IP blocks).
  • Experience programming in C++, using advanced language features.
  • Knowledge of SoC, CPU, GPU, and/or ASIC architecture and micro-architecture.
  • Experience as a mentor, tech lead or leading an engineering team.

Nice to have

  • Experience working with DV teams or integrating models into verification flows.
  • Experience correlating functional models against RTL simulation, emulation, or silicon.
  • Experience developing and calibrating performance models for custom silicon.
  • Experience with SystemC, TLM, or cycle-approximate modeling methodologies.
  • Experience building regression and CI frameworks for model validation.
  • Familiarity with Modern C++ (20 and beyond).
  • Experience with multi-threaded or distributed simulation.
  • ML accelerator architecture knowledge (a plus, not required).

Culture & Benefits

  • hirify.global offers comprehensive benefits including health insurance, 401(k) matching, paid time off, and parental leave.
  • Our inclusive culture empowers hirify.globalians to deliver the best results for our customers.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →