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11 часов назад

Sr. IP Logic Design Engineer (AI)

190 610 - 269 100$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

Текст:
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TL;DR

Sr. IP Logic Design Engineer (AI): Designing and implementing scalable memory fabric microarchitecture and coherency protocols for data center and AI SoCs with an accent on performance, power, and area optimization. Focus on developing RTL code for interconnect blocks, collaborating on system integration, and solving complex memory coherency challenges.

Location: Must be based in the United States (Santa Clara, CA or Beaver Brook, MA); hybrid work model required.

Salary: $190,610–$269,100

Company

hirify.global provides high-performance compute solutions, including custom x86 and AI-accelerated systems for the global data center segment.

What you will do

  • Architect high-performance, low-latency memory coherency protocols and interconnect topologies.
  • Develop and implement RTL code for core memory fabric components.
  • Collaborate with verification teams to define test plans and resolve pre-silicon validation issues.
  • Optimize system architecture through performance analysis and workload modeling.
  • Work cross-functionally with physical design, software, and firmware teams for system integration.
  • Mentor junior engineers and lead technical design reviews.

Requirements

  • Education: MS or PhD in Electrical Engineering, Computer Engineering, or related field.
  • Experience: 10+ years in SoC design, including memory systems and coherency protocols.
  • Strong expertise in protocols such as MESI, MOESI, CXL, CCIX, or CHI.
  • Proven proficiency in Verilog or SystemVerilog RTL coding.
  • Knowledge of interconnect technologies like AMBA, PCIe, or NoC architectures.
  • Familiarity with EDA tools for synthesis and static timing analysis.

Nice to have

  • Background in AI/ML accelerator design.
  • Hands-on experience with advanced memory technologies like HBM or DDR.
  • Scripting proficiency in Python or TCL for automation.
  • Experience with software-hardware co-design optimization.

Culture & Benefits

  • Competitive total compensation including base pay and stock bonuses.
  • Comprehensive health and retirement benefit programs.
  • Hybrid work environment allowing time on-site and off-site.
  • Opportunities to work on industry-leading data center and AI infrastructure.

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