TL;DR
Principal Physical Design Engineer: Leading RTL-to-GDSII implementation for multiple SoC programs, overseeing various aspects of physical design and verification with an accent on hierarchical design strategies and advanced process node challenges. Focus on providing strategic leadership, technical direction, and mentoring engineering talent to drive innovation and continuous improvement in physical design methodologies.
Location: This role is located at our Irvine, California office. Working at a different location is not offered at this time. Relocation will be provided for qualified candidates.
Salary: 156,400 - 231,440 USD per annum
Company
hirify.global’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
What you will do
- Shape the long-term vision for physical design capabilities and infrastructure.
- Lead RTL-to-GDSII implementation for multiple SoC programs.
- Provide strategic leadership and technical direction to physical design teams.
- Mentor and develop engineering talent, fostering a culture of innovation.
- Drive cross-functional collaboration with design teams.
- Drive the development and adoption of next-generation physical design methodologies.
Requirements
- Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree
- 10+ years of progressive experience in back-end physical design and verification, including significant leadership roles
- Deep expertise in hierarchical physical design strategies, methodologies, and advanced process node challenges
- In-depth understanding of current design technologies used in major foundries
- Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure highly preferred
- Strong communication and collaboration skills, with the ability to influence cross-functional teams and executive stakeholders
Nice to have
- Preferred experience in automation and scripting using Makefile, Tcl, Python, or Perl to enhance design efficiency and flow robustness
- Experience in developing and deploying advanced physical design methodologies and flows
- Strong knowledge preferred on static timing analysis (PrimeTime, Tempus), EM/IR-Drop/crosstalk analysis (PTSI, Voltus, Redhawk, PrimeRail), extraction (Quantus, StarRC), formal or physical verification (Formality, Verplex, Calibre, Hercules) a plus
- Familiarity with AI/ML-driven optimization in physical design tools is a plus
Culture & Benefits
- Employee stock purchase plan with a 2-year look back.
- Family support programs to help balance work and home life.
- Robust mental health resources to prioritize emotional well-being.
- Recognition and service awards to celebrate contributions and milestones.
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