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9 часов назад

Analog Mixed-Signal Design Co-Op (Semiconductor)

64 480 - 107 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
trainee
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR

Analog Mixed-Signal Design Co-Op (Semiconductor): Supporting Analog-Mixed-Signal and Digital Integration activities for next-generation semiconductor designs with an accent on mixed-signal IP integration, basic RTL coding, and AMS simulation. Focus on full-chip integration, mixed-signal verification, and silicon bring-up.

Location: San Jose, California, USA (Onsite)

Salary: $64,480–$107,500 annually

Company

hirify.global is a global semiconductor company designing and manufacturing integrated circuits and embedded technologies.

What you will do

  • Assist in integrating analog and digital blocks into top-level AMS environments.
  • Prepare schematic and netlist views used for AMS simulations.
  • Write and modify simple RTL modules (wrappers, muxes, registers) and assist with digital-on-top flows.
  • Run AMS simulations (Spectre/Xcelium/AMS Designer) for block and top-level tests.
  • Support bench measurements for AMS blocks and subsystems (oscilloscope, power-up sequences).
  • Assist in model packaging, scripting, and updating internal documentation and integration guides.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a closely related field.
  • Solid academic grounding in analog circuits, digital logic design, SPICE simulation, and HDL coding (Verilog preferred).
  • Hands-on experience through coursework or projects with oscilloscopes, logic analyzers, power supplies, and simulation environments (SPICE, Cadence, Mentor).
  • Comfort with Linux and scripting basics (Python, Bash, TCL).
  • Strong communication, organization, and eagerness to learn.
  • Must be based onsite in San Jose, California.

Nice to have

  • Completed senior-level coursework or projects in data converters, PLLs, or mixed-signal IC design.
  • Familiarity with Verilog-AMS, SystemVerilog, or wreal modeling.
  • Prior lab/Co-op experience in semiconductor or embedded domains.
  • Exposure to Git, revision control, and automation scripts.

Culture & Benefits

  • Competitive benefits including health, dental, and vision insurance.
  • 401(k) retirement plan and paid leave.
  • Opportunity for mentorship from experienced engineers in full-chip integration, mixed-signal verification, and silicon bring-up.
  • NXP is an Equal Opportunity/Affirmative Action Employer.

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