Senior Staff Engineer, Analog Layout

TL;DR

Senior Staff Engineer, Analog Layout: Contribute to the development of high-speed connectivity and data-transport products, focusing on laying out high-performance analog circuits in CMOS technologies and performing top-level integrations. Focus on optimizing parasitic effects in layout and ensuring successful volume production.

Location: Must be based in Singapore

Company

hirify.global provides semiconductor solutions for data infrastructure, enabling new possibilities across enterprise, cloud and AI, and carrier architectures.

What you will do

• Own chip/macro layout and overall project schedule, coordinating with layout, design, backend, frontend, ESD, packaging, and CAD teams.
• Implement project-specific guidelines and contribute to team development through tool testing, script development, and documentation.
• Keep abreast of technology and tool developments, bringing new ideas to the team.

Requirements

• Bachelor’s or Master's degree in Computer Science, Electrical Engineering, or related fields with 15+ years of experience.
• Deep understanding of layout methodology from chip planning to tape-out.
• Proficiency in interpreting CALIBRE DRC, ERC, and LVS reports.
• High-level proficiency in Synopsys or CADENCE layout entry tools.
• Fluent in English.
• Must be based in Singapore

Nice to have

• Experience in advanced process technology and Fin-FET.
• Programming skills in Skill, Ample, or Perl.

Culture & Benefits

• Enjoy a workstyle within an environment of shared collaboration, transparency, and inclusivity.
• Access to tools and resources for success in meaningful work and professional development.