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3 дня назад

Sr Staff CAD Engineer (EDA)

127 630 - 191 200$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Sr Staff CAD Engineer (EDA): Developing and optimizing automated CAD and EDA design flows for digital and analog IC design, physical verification, and SoC tapeout with an accent on tool integration, methodology development, and design automation. Focus on building physical verification run sets, integrating third-party IP, solving complex tool issues, and supporting foundry and cross-functional engineering activities.

Location: Santa Clara, CA, United States of America

Expected base pay: $127,630–$191,200 per annum, plus eligibility for bonus and equity plans.

Company

hirify.global develops semiconductor solutions for enterprise, cloud and AI, and carrier data infrastructure.

What you will do

  • Develop next-generation CAD and EDA tools, automated design flows, run sets, design rule decks, and physical verification methodologies.
  • Support Calibre and ICV physical verification debugging, signoff, tapeout, SoC integration, and foundry interface activities.
  • Automate layout migration, physical verification workflows, and third-party IP onboarding.
  • Integrate, evaluate, maintain, and optimize EDA tools, libraries, and IPs for digital and analog IC design.
  • Collaborate with foundry engineers, design engineers, layout designers, and software developers; provide technical guidance, training, and support.
  • Create validation procedures, user guides, documentation, and training materials.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5+ years of related professional experience, or a Master’s degree and/or PhD with 3 years of experience.
  • At least 5 years of experience in CAD and EDA tool development and support, preferably in the semiconductor industry.
  • Hands-on expertise with EDA tools and methodologies for digital and analog IC design, verification, and physical implementation.
  • Experience with Cadence, Synopsys, Mentor Graphics, and scripting languages including Tcl, Perl, and Python; Synopsys ICV is required.
  • Strong understanding of the complete IC design flow, including RTL, synthesis, simulation, place and route, timing analysis, and physical verification.
  • Ability to analyze complex design and tool issues, propose solutions, and drive them to completion.
  • Strong interpersonal and communication skills and the ability to collaborate with cross-functional teams.
  • Experience leading projects or initiatives, providing technical guidance, and mentoring junior engineers.
  • Motivation to follow advances in CAD and EDA tools and methodologies and drive continuous improvement.

Nice to have

  • Experience with Mentor Calibre SVRF/TVF.

Culture & Benefits

  • Full-time employment with comprehensive benefits supporting financial well-being, family support, mental and physical health, and recognition.
  • Employee stock purchase plan with a 2-year look back, bonus eligibility, new-hire equity grant, and annual equity refreshers.
  • Access to family support programs, mental health resources, and recognition and service awards.
  • Access to export-controlled technology may require eligibility under U.S. export control laws and an export license review for certain applicants.
  • AI tools, transcription apps, automated note-taking bots, and real-time answer generators are prohibited during interviews; unauthorized use results in disqualification.

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