Senior Mixed Signal Post Silicon Validation Engineer IOs (High-Speed PHY)

Location: Hybrid work model in Folsom or Santa Clara, California, United States; employees split time between an assigned hirify.global site and off-site work.

Annual salary: $141,910–$200,340 USD.

Company

hirify.global's Central Engineering Organization develops hard IP for Server, Client, Networking, and hirify.global Foundry SOCs, including Serial and Parallel IO PHYs.

What you will do

• Generate test plans and test content for mixed-signal high-speed PHY post-silicon validation.
• Characterize clocking, transmitter, and receiver blocks.
• Debug PCIe, UCIe, DDR, Ethernet, and related IO protocols from PHY recipe and firmware perspectives.
• Review SOC board designs, provide recommendations, and support post-silicon debug.
• Represent the IP team during SOC power-ons and enable PCIe, UCIe, and USB PHYs on test chips and products.
• Reproduce customer issues, investigate silicon problems, and drive root-cause analysis and bug disposition.

Requirements

• BS with 6+ years, MS with 4+ years, or PhD with 2+ years of experience in Electrical Engineering, Computer Engineering, or a related field.
• Relevant electrical or bench post-silicon validation experience with one or more high-speed PHYs, such as PCIe, USB, UCIe, DDR, Ethernet, or an equivalent interface.
• Experience using lab hardware and software including oscilloscopes, logic analyzers, protocol analyzers, and BERTs.
• Knowledge of at least one industry-standard IO specification, such as PCIe, USB, or Die-to-Die UCIe.
• Customer-focused, adaptable, collaborative, and able to resolve technical issues with urgency across multiple teams and debug scenarios.

Nice to have

• Mixed-signal IP characterization experience, including PLL and TX/RX jitter characterization.
• Experience leading IP debug efforts as well as executing hands-on debug.
• Signal integrity and power delivery knowledge.
• Pre-silicon design or simulation experience in logic, circuits, firmware, MRC, or mixed-signal validation.

Culture & Benefits

• Hybrid work model with time split between an assigned hirify.global site and off-site work.
• Full-time employment with competitive pay, stock bonuses, health benefits, retirement benefits, and vacation.
• Collaborative work with IP design teams and SOC customers.
• Shift 1 working schedule in the United States.