Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$105к-195к/год
$120к$150кмедиана$180к
По похожим ролям (50) ~ $150к/год
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Чёткий фокус на алгоритмах маршрутизации в зрелом продукте для проектирования микросхем сочетается с понятными задачами и интересными техническими вызовами.
Актуальные технологии
Понятные задачи
Сфера микроэлектроники
Мэтч & Сопровод
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Software Engineer II (C/C++ Routing): Developing advanced bus-routing and constrained-routing algorithms for Innovus, Cadence’s digital implementation platform for semiconductor chip design, with an accent on high-performance software, scalability, and routing quality. Focus on solving complex physical-design problems, debugging Linux/UNIX software, and delivering production-quality features with R&D teams.
Location: San Jose, California, United States; onsite
Annual salary: $105,000–$195,000 in California. Additional incentive compensation, including bonus, equity, and benefits, may apply.
Company
hirify.global Design Systems develops software and platforms for designing advanced semiconductor chips; Innovus is its digital implementation platform from RTL to GDSII.
What you will do
Design and implement algorithms for advanced bus routing and constrained routing.
Develop high-performance, scalable C/C++ software for Linux/UNIX platforms.
Debug routing issues and improve quality of results, runtime, and robustness.
Collaborate with R&D teams to define requirements, validate solutions, and deliver production-quality features.
Requirements
MS in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
Strong C/C++ programming skills.
Strong foundation in algorithms, data structures, and problem-solving.
Good understanding of software development and debugging in Linux/UNIX environments.
Strong analytical and debugging skills.
Ability to work effectively in a collaborative, team-oriented environment.
Nice to have
Coursework, research, internship, or project experience in VLSI CAD, physical design, algorithms, computational geometry, or optimization.
Basic knowledge of digital IC design or physical design concepts.
Experience with algorithm development or large-scale software development.
Familiarity with Tcl, Python, or Perl.
Exposure to EDA tools or place-and-route flows.
Culture & Benefits
Full-time role focused on impactful semiconductor technology and innovation.
Paid vacation and holidays.
401(k) plan with employer match.
Employee stock purchase plan.
Medical, dental, and vision plan options.
Bonus, equity, and other incentive compensation may be available.
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