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3 дня назад

Master Thesis (30 hp): Multi-Channel IQ Data Generation with Angle of Arrival (FPGA)

Формат работы
onsite
Тип работы
project
Грейд
trainee
Английский
b2
Страна
Sweden
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Master Thesis (30 hp): Multi-Channel IQ Data Generation with Angle of Arrival (FPGA): Developing a simulator that models antenna signals and generates synchronized phase-delta streams for IQ-data and FPGA application testing with an accent on angle-of-arrival modelling, digital signal processing, and configurable signal generation. Focus on investigating antenna-channel phase and time differences, verifying generated phase deltas, and integrating the simulator with FPGA simulation and testbench environments.

Location: Solna, Sweden

Company

hirify.global is a defense and security company developing advanced systems in aeronautics, weapons, command and control, sensors, and underwater systems.

What you will do

  • Develop a simulator that generates channel phase deltas according to Angle of Arrival (AoA).
  • Model signals received by multiple antennas and investigate AoA-related phase and time differences between antenna channels.
  • Implement a configurable phase-delta generator based on a pulse descriptor word or similar signal description.
  • Generate four synchronized phase-delta streams for signals arriving from specified directions.
  • Verify the generated phase deltas and integrate the simulator with FPGA simulation and testbench environments.

Requirements

  • Be in the final stage of Electrical Engineering, Engineering Physics, Computer Engineering, Data Engineering, or an equivalent program.
  • Be about to begin a 30 hp master thesis project.
  • Have an interest in signal processing, radar, communications, or FPGA technology.
  • Pass security vetting under current security-protection regulations; additional citizenship obligations may apply for positions requiring security clearance.

Nice to have

  • Experience with Python.
  • Experience with FPGA development.

Culture & Benefits

  • Collaborate with experienced engineers and specialists while applying academic knowledge to practical technological development.
  • Receive support and guidance throughout the thesis project.
  • Work on a project combining digital signal processing, mathematical modelling, and software development.
  • The project is intended for one student.

Hiring process

  • Applications are reviewed on an ongoing basis, and the position may be filled before the closing date.
  • Application closing date: 18 November 2026.

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