Senior Standard Cell Library Design Manager

Location: Penang, Malaysia; hybrid work model with time split between the assigned hirify.global site and off-site work

Company

hirify.global develops semiconductor technologies and foundry design technology platforms, including standard cell library IP for internal product teams and external customers.

What you will do

• Lead and manage the Malaysia-based Standard Cell Library organization across its design, layout, extraction, characterization, modeling, validation, quality, documentation, and release functions.
• Lead standard cell library development and optimization for advanced technology nodes, targeting best-in-class power, performance, area, and ease of use.
• Manage engineers, technical leaders, and managers working on circuit and layout development, FE/BE modeling, reliability and IR-drop characterization, automation, and validation flows.
• Collaborate with process technologists, product design teams, IFS stakeholders, EDA vendors, global functions, and customers on DTCO solutions and library requirements.
• Set goals, facilitate execution, maintain accountability, prioritize work across multiple releases, and drive process improvement and quality standards.
• Support production standard cell content for process and PDK releases and ensure project milestones are delivered on time.

Requirements

• 12+ years of demonstrable experience in most standard cell library domains, including circuit design, standard cell layout, extraction, characterization, modeling, physical and logic view abstraction, reliability and IR-drop characterization, validation, quality assurance, documentation, library releases, and customer support.
• Deep working knowledge of digital logic design and standard cell library development in advanced nodes.
• Ability to interpret industry benchmarks, create and execute strategies, work independently, and manage diverse assignments in a complex environment.
• Strong initiative and persistence, with the ability to handle ambiguity, task pressure, and deadlines.
• Strong written and verbal communication skills, including synthesizing complex information into clear presentations.

Nice to have

• In-depth knowledge of CMOS combinatorial and sequential circuit design, layout, standard cell modeling, extraction, and characterization.
• Foundry ecosystem and benchmarking experience, with technical, analytical, customer-oriented, and cross-functional collaboration skills.
• Experience in designing flip-flops, clock-gating cells, level shifters, power-gating cells, and other complex circuits.
• Understanding of CMOS device characteristics, submicron design rules and process issues, FinFET technologies, and high-sigma variation analysis.
• Experience optimizing standard cell circuits and layout parasitics to improve power, performance, and area.
• Experience with layout extraction, layout-dependent parameters, and timing/leakage characterization of standard cells.
• Scripting capability in Tcl, Perl, or Python, along with strong analytical and logical skills.
• Ability to work effectively in a dynamic, matrixed, team-oriented environment.

Culture & Benefits

• Full-time experienced-hire position on Shift 1 in Malaysia.
• Hybrid work model combining on-site work at the assigned hirify.global site with off-site work.
• Collaboration with global teams across multiple technical and business functions.
• Employment follows ethical hiring practices; candidates are not charged recruitment, medical examination, or other hiring-related fees.