Senior / Staff Verification Engineer - RF/TIA (Analog Mixed Signal)

Location: Singapore

Company

hirify.global develops semiconductor solutions and physical-layer ICs for enterprise, cloud, AI, carrier, and high-speed fiber-optic data infrastructure.

What you will do

• Own verification of major blocks or complete broadband ICs.
• Develop mixed-signal verification plans for broadband amplifiers based on architecture and specifications.
• Create chip-level test cases and verification testbenches using industry-standard languages and methodologies.
• Review verification results, assess coverage, and provide feedback to design teams.
• Document verification plans, test results, and design changes.
• Collaborate with design and layout teams to resolve issues across SiGe BiCMOS and CMOS process nodes.

Requirements

• BS in Electrical Engineering; MSc in high-performance analog/mixed-signal design and verification is preferred.
• 4–8 years of experience in analog IC design or verification.
• Strong understanding of analog and mixed-signal circuit design and verification principles.
• Experience with EDA/CAD tools including Cadence Virtuoso, Assembler, Spectre, and AMS simulators.
• Knowledge of transistor-level design, control/feedback loop stability analysis, AGC loop design, and high-precision analog circuits including linear regulators, current sensors, bandgaps, DACs, and ADCs.
• Knowledge of RF and high-speed broadband techniques; project experience with different technologies.
• Strong programming skills, including the ability to write efficient Python programs or scripts; Verilog/Verilog-A is a plus.
• Excellent debugging, problem-solving, analytical, communication, presentation, documentation, and organizational skills.
• Ability to work effectively in a team, learn new technologies, and track specification compliance and verification results for an entire chip.

Nice to have

• Experience with SiGe BiCMOS technology.
• MSc in a relevant high-performance analog/mixed-signal design and verification field.
• Verilog/Verilog-A programming experience.

Culture & Benefits

• Full-time employment with a collaborative, transparent, and inclusive work environment.
• Competitive base salary, performance bonus, RSUs, new-hire equity grant, annual equity refreshers, and an employee stock purchase plan.
• Medical, hospital, surgical, outpatient, A&E, wellness, dental, vision, vaccination, and family-support benefits for eligible employees and dependents living in Singapore.
• Annual leave starting at 17 days, plus sick, parental, childcare, bereavement, marriage, examination, and family-care leave.
• Family-planning, childcare, eldercare, mental-health coaching, and Lyra therapy or coaching support.

Hiring process

• AI tools, transcription apps, real-time answer generators, and automated note-taking bots are prohibited during interviews; using them may result in disqualification.
• Applicants must be eligible to access export-controlled technology and software; an export license review may be required before employment.