ASIC Physical Design Engineer

Location: Singapore-Yishun, Singapore; onsite role.

Company

hirify.global develops semiconductor and infrastructure technology products.

What you will do

• Use commercial and in-house EDA tools, including Synopsys, Cadence, and Siemens, to design and implement 100–400 million gate integrated circuits.
• Work with 7nm, 5nm, 3nm, and 2nm process technologies.
• Handle complete RTL-to-GDS or Gates-to-GDS flows, including RTL synthesis, placement, clock tree synthesis, detailed routing, physical verification, formal verification, and timing analysis.

Requirements

• Degree, master's degree, or PhD in Electrical, Electronics, or Computer Engineering.
• At least 5 years of relevant experience.

Nice to have

• In-depth knowledge of GPU, CPU, or DSP architecture and algorithms, plus related physical design implementation techniques.
• Proficiency in UNIX/Linux and scripting languages.

Culture & Benefits

• Full-time employment in Singapore-Yishun.
• hirify.global is an equal opportunity employer and considers qualified applicants without regard to protected characteristics under applicable law.
• Applicants located outside the USA must provide a home address for future correspondence.

Hiring process

• First-time users must create a candidate login account before applying.
• Existing candidate account holders must sign in before applying.