Senior Design Engineer (Physical Design)

Location: Gyeonggi-do (Seoul), Republic of Korea

Company

hirify.global develops technology and tools for advanced electronic design and semiconductor development.

What you will do

• Implement ASIC physical design projects, including floorplanning, power grid design, place and route, clock tree synthesis, and timing closure.
• Perform power and signal integrity signoff, physical verification including DRC, LVS, and antenna checks, EM/IR signoff, and DFM closure.
• Work on low-power and high-speed designs using the latest technology nodes.
• Participate in or lead next-generation physical design methodology and flow development.
• Collaborate closely with RTL design teams to support successful tapeouts.

Requirements

• 9+ years of experience with ASIC design flows, hierarchical physical design strategies, methodologies, and deep sub-micron technology issues.
• Strong knowledge of low-power design, DFT, static timing analysis and closure, data skew balancing, and duty-cycle adjustment.
• Experience with EM/IR-drop and crosstalk analysis, formal verification, physical verification, DFM, and place and route.
• Ability to take responsibility for varied technical tasks and work independently.
• Hands-on capability across all design levels, including verifying, testing, and characterizing designs.
• Self-motivated team player with good English communication skills.

Culture & Benefits

• Full-time position in hirify.global Korea.
• Opportunity to work on challenging low-power and high-speed designs at advanced technology nodes.
• Work environment focused on leadership, innovation, and impactful technology development.