FPGA Prototyping & Physical AI Intern

Location: Penang, Malaysia; Penang-based placement required

Company

Develops low-cost, low-power programmable logic solutions, FPGA, CPLD, and programmable power management devices for worldwide customer engagements.

What you will do

• Design, integrate, and validate RTL for prototype FPGA systems, including PCIe root port, USB host, AXI/APB interconnect, timing closure, and resource optimization on Lattice Avant and Nexus devices using Radiant and Propel.
• Develop hardware-software co-design flows for Physical AI, partitioning vision-language-action and robot-control pipelines between host GPU and FPGA.
• Profile latency and power, evaluate quantization and pruning trade-offs, and validate hardware-in-the-loop on robot platforms.
• Debug across simulation, self-checking testbenches, waveform and log analysis, board bring-up, embedded firmware, and host-side software integration.
• Automate regression testing, board-farm continuous integration, telemetry, logging, and reproducible test-result reporting.
• Contribute to reference designs, user guides, application notes, and demo bring-up for tradeshows and customer engagements.

Requirements

• Final-year or penultimate-year student in Electrical, Electronic, Computer Systems, or Computer Engineering.
• Required experience with RTL design and verification, including SystemVerilog or Verilog, FSM and datapath design, and self-checking testbenches.
• Required experience with FPGA timing closure or resource analysis.
• Embedded C/C++ experience with DMA, interrupts, and memory-mapped I/O.
• Ability to work through ambiguity and build scalable frameworks for additional platforms and higher-complexity integration.
• Outstanding communication and documentation skills, with the ability to work across functional teams, sites, and cultures.
• Availability for a 12-week placement between December 2026 and February 2027 and ability to be based in Penang.
• Satisfactory background and reference checks and proof of the right to work in Malaysia are required.

Nice to have

• SoC integration with soft-core processors and an RTOS.
• Exposure to ML inference deployment, model compression such as quantization and pruning, or robotics control loops.

Culture & Benefits

• Fast-paced, results-oriented, team-first environment.
• Collaboration across international sites, functions, and cultures.
• Opportunity to develop technical depth across RTL design, SoC integration, and AI-on-FPGA.
• Work on prototype platforms and reference designs supporting customer engagements.
• Comprehensive compensation and benefits programs are offered to employees.