Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
Пожаловаться
88
Отличная вакансия
развернуть
Чётко описанная senior-роль с ответственностью за FPGA-разработку и верификацию, широкими техническими задачами и возможностью влиять на работу команды; главный практический нюанс - работа в офисе в Пенанге.
Кликните для подробной информации
Ответственность за весь циклАктуальные технологииВлияние на командуРабота в Пенанге
Оценка от Hirify AI
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Подключить Plus
Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Embedded Systems and IP Engineer (FPGA): Designing, verifying, and delivering configurable FPGA soft IP and embedded solutions with an accent on synthesizable RTL, embedded-system integration, and production-quality verification. Focus on developing SystemVerilog and UVM environments, closing coverage and quality gaps, debugging across hardware and software boundaries, and leading complex features through release.
hirify.global’s Software, IP and Solutions organization develops configurable intellectual property and embedded solutions that enable customers to use hirify.global FPGA devices efficiently and reliably.
What you will do
Translate system, product, and customer-use-case requirements into architecture proposals, technical specifications, interface definitions, and acceptance criteria.
Design, implement, integrate, and debug synthesizable RTL with Verilog and SystemVerilog for FPGA soft IP and embedded systems.
Develop IP collateral, including register descriptions, constraints, integration guidance, simulation models, design examples, and technical documentation.
Integrate and configure IP and subsystems using Quartus, Platform Designer, Visual Designer Studio, or equivalent FPGA design flows, accounting for timing, throughput, latency, power, clocking, reset, CDC/RDC, and resource trade-offs.
Own verification strategies and plans; develop test benches, drivers, monitors, scoreboards, BFMs, assertions, functional coverage, and directed or constrained-random tests.
Lead simulations, regressions, lint, CDC/RDC, synthesis, timing analysis, defect triage, failure root-cause analysis, release readiness, post-release support, and productivity improvements through automation and CI/CD.
Requirements
Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field.
At least 7 years of relevant experience in embedded systems, FPGA, RTL design, design verification, or a closely related engineering field; equivalent demonstrated expertise may be considered.
Strong understanding of digital design, computer architecture, embedded systems, FPGA architecture, and hardware/software interaction.
Experience creating or maintaining verification environments and test content using SystemVerilog, UVM, or equivalent methodologies.
Experience with functional coverage, assertions, regression management, waveform analysis, and systematic failure triage.
Proficiency in Python and/or other scripting languages, plus working knowledge of C or C++ for embedded or verification use cases.
Experience with FPGA implementation and analysis flows, including Quartus or an equivalent FPGA toolchain.
Strong analytical, problem-solving, written, verbal, and cross-functional collaboration skills.
Culture & Benefits
Regular full-time employment based in Penang, Malaysia.
Collaboration across geographically distributed engineering teams and sites.
Opportunities to mentor junior engineers and interns and influence technical trade-offs across teams.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →