Embedded Soft IP Intern (FPGA)

Location: Penang 15, Penang, Malaysia. Onsite, Shift 1 (Malaysia).

Company

hirify.global develops FPGA devices and related RTL-based IPs, software, and embedded reference designs.

What you will do

• Design, verify, and release RTL-based IPs into Quartus and contribute to embedded reference designs.
• Improve design and validation methodologies, including scripting and process enhancements.
• Write functional tests, debug regression failures, identify root causes, and propose solutions.
• Review functional requirements and specifications for IPs and designs.
• Run design flows and regressions and participate in design implementation.
• Participate in team meetings, reviews, and design discussions with hardware and software engineers.

Requirements

• Currently pursuing a Bachelor’s or Master’s degree in Electrical, Computer, or Electronics Engineering, Computer Science, or a comparable discipline.
• Strong understanding of digital logic design and basic computer architecture.
• Familiarity with scripting languages such as Python, Perl, or TCL.
• Familiarity with SystemVerilog, Verilog, or VHDL.
• Exposure to FPGA design flows or tools such as Quartus or Vivado.
• Passion for learning, curiosity, and a growth mindset.
• Ability to work independently and effectively in a multi-site team environment.
• Fluent communication skills, systematic problem-solving and debugging ability, and a goal-oriented approach to completing assignments on time and with quality.

Culture & Benefits

• Work with a diverse, multi-site team of hardware and software engineers.
• Gain exposure to industry practices and build broad and deep technical skills.
• Contribute to designs used across many industries.
• Student / Intern fixed-term position with full-time employment.