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$98к-176к/год
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Это четко описанная инженерная роль в крупной полупроводниковой компании с фокусом на криогенное моделирование и технологии для квантовых систем. Набор требований узкий и специализированный, поэтому круг подходящих специалистов будет ограничен.
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Квантовые технологии
Понятные задачи
Крупный производитель
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Quantum CryoCMOS Device Modeling Engineer (Semiconductor): Developing and validating predictive compact models for CMOS transistors, superconducting elements, and photonic devices from room temperature to cryogenic regimes with an accent on parameter extraction, measured-data correlation, and PDK/EDA deployment. Focus on modeling temperature-dependent behavior, variability, mismatch, noise, reliability, and convergence challenges for cryogenic design enablement and quantum control/readout circuits.
Location: Offsite, United States; listed location: Malta, New York
Salary: $98,000–$176,000 per year; exact salary depends on qualifications, experience, and location.
Company
hirify.global is a full-service semiconductor foundry providing design, development, and fabrication services with a global manufacturing footprint.
What you will do
Develop and calibrate physics-based compact models for CMOS and related transistors across room-temperature and cryogenic operating regimes, including nominal, corner, and statistical behavior.
Develop, calibrate, and validate simulation-ready models for superconducting and photonic elements using measured data and relevant physical mechanisms.
Plan parameter-extraction and model-validation workflows using electrical characterization data from device test structures and test chips.
Correlate models with measured data, semiconductor, superconducting, and photonic physics, and TCAD results; identify limitations and drive corrective actions.
Integrate and qualify model files in PDK and EDA simulation environments through regression testing, convergence checks, documentation, and release preparation.
Collaborate with device engineering, technology development, characterization, PDK, EDA, and circuit-design teams and communicate assumptions, validation results, and usage guidance.
Requirements
Bachelor’s degree in Electrical Engineering, Microelectronics, Physics, Applied Physics, or a related field.
At least 5 years of experience applying semiconductor device physics to device modeling, transistor compact-model development, parameter extraction, device characterization, or closely related work.
Strong semiconductor device-physics background and understanding of transistor compact modeling and MOSFET behavior, including short-channel effects, leakage, capacitance, variability, and temperature dependence.
Ability to develop or apply models for superconducting and photonic elements, including physical-effect selection, parameterization, validation, and deployment in circuit- or system-level simulations.
Hands-on compact-model parameter extraction and model validation using measured device data.
Experience with SPICE-class simulation and commercial EDA environments such as Cadence Virtuoso/Spectre, Synopsys PrimeSim/HSPICE, or Siemens EDA tools.
Proficiency in Python, MATLAB, or equivalent scripting/programming tools in a Linux/Unix environment.
Ability to interpret electrical characterization data and communicate technical conclusions to device, modeling, PDK, and design stakeholders.
Travel of up to 10% and fluency in written and verbal English.
Nice to have
Master’s degree or PhD in a relevant engineering, microelectronics, physics, or applied-physics field.
Advanced experience with BSIM4, BSIM-CMG, PSP, or related compact-model families.
Experience with cryogenic electronics or semiconductor behavior from approximately 300 K to 4 K, including freeze-out, threshold-voltage shifts, mobility changes, self-heating, noise, and convergence challenges.
Experience with Keysight IC-CAP, Synopsys Mystic, or automated parameter-extraction frameworks; TCAD correlation; statistical modeling; variability analysis; or Monte Carlo methods.
Experience supporting PDK releases, model QA, regression testing, version control, and customer-facing documentation.
Project management, innovation, execution, communication, planning, organization, and ability to navigate ambiguity.
Culture & Benefits
Full-time employment at a global semiconductor foundry.
Work is performed offsite, with travel of up to 10%.
Employment is subject to applicable pre-employment conditions, laws, and regulations.
Reasonable accommodations are available during the employment process upon request.
hirify.global states its commitment to equal opportunity and a diverse workplace.
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