Design Verification Engineer, New Grad (AI)

Location: San Jose, California, United States

Base salary: $120,000–$150,000 USD per year

Company

hirify.global develops AI infrastructure centered on the RDU reconfigurable dataflow chip and SambaRack rack-scale hardware for deploying AI models.

What you will do

• Write and execute verification plans for chip-level control and initialization features.
• Build SystemVerilog and UVM testbench components, including sequences, checkers, assertions, and functional coverage.
• Write directed and constrained-random tests to identify corner cases.
• Run regressions and debug simulation failures with RTL designers.
• Analyze functional and code coverage and close coverage gaps.

Requirements

• B.S. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Coursework or project experience in digital design and computer architecture.
• Experience with SystemVerilog or Verilog.
• Experience with UVM.
• Scripting experience in Python, Perl, TCL, or shell.
• Familiarity with constrained-random verification, functional coverage, and assertions.
• Familiarity with clock domain crossing concepts.

Nice to have

• M.S. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Experience using AI tools such as Claude for verification development and debugging.
• Internship experience in design verification.

Culture & Benefits

• Full-time US employment with equity and benefits.
• Medical insurance with 95% employee premium coverage and 77% dependent premium coverage.
• Health Savings Account with employer contribution, Dental, Vision, Disability, Life, AD&D, and Flexible Spending Account options.
• Well-being benefits include Headspace, Gympass+, One Medical, and counseling through an Employee Assistance Program.