socrfanalog designmixed signalcmospower managementpllanalog icsilicon bring up
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$73к$189кмедиана$227к
5 в выборке
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Крутая вакансия
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Чётко очерченная архитектурная роль в известной продуктовой компании даёт серьёзную техническую ответственность, влияние на решения команд и работу над новыми IoT-чипами.
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Понятная зона ответственностиСильный сегмент IoTТехническое влияниеСемейные льготы
Оценка от Hirify AI
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Senior Analog SoC Architect (Mixed-Signal IC): Defining analog and mixed-signal architectures for next-generation microcontroller and wireless SoCs with an accent on performance, power, area, robustness, and reliability. Focus on translating system requirements into verified architectures, integrating analog IP at chip level, and solving complex silicon bring-up, verification, and transistor-level design challenges.
Location: Oulu, Finland or Tampere, Finland
Company
hirify.global is a Norwegian fabless semiconductor company specializing in wireless communication technology for Internet of Things devices, including Bluetooth Low Energy, ANT+, Thread, Zigbee, LTE-M/NB-IoT, and Wi-Fi.
What you will do
Define analog and mixed-signal architectures for next-generation microcontroller and wireless SoCs, balancing performance, power, area, robustness, and reliability.
Translate product and system requirements into block-level specifications, budgets, and verified architectures, and evaluate technology options through feasibility studies and prototyping.
Guide design teams through schematics, simulation, design reviews, layout, post-layout checks, and transistor-level work when needed.
Define simulation and verification strategies, including top-level analog and mixed-signal verification across the design cycle.
Own chip-level analog IP integration and collaborate with digital, power management, RF, layout, test, and product engineering teams on floorplanning, silicon bring-up, and characterization.
Mentor engineers, improve design methodologies and reuse strategies, and document architectural decisions, results, assumptions, and risks.
Requirements
Master’s degree or PhD in electrical engineering, microelectronics, physics, or a related field.
Extensive hands-on experience with analog and mixed-signal ICs, including several complete SoC or IP projects taken to production.
Proven experience defining architectures and specifications for complex analog systems such as data converters, PLLs and clocking, power management, or RF and analog front-ends.
Strong understanding of CMOS devices and analog fundamentals, including feedback, noise, mismatch, stability, and process-voltage-temperature effects.
Extensive pre-layout and post-layout simulation and verification experience, including system-level verification.
Experience with silicon bring-up, debugging, and root-cause analysis.
Ability to influence technical decisions across teams and mentor senior engineers.
Strong communication skills and fluent English.
Culture & Benefits
Professional and informal working environment with continuous development of skills and expertise.
Varied tasks and projects alongside experienced specialists and recognized experts in the field.
Flexible working hours.
Medical insurance and family-friendly policies, insurance, and benefits.
Competitive salary with short- and long-term incentive plans.
Background check may be required.
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