Principal Embedded Firmware Engineer (Networking PAM4 DSP)
Контакты
154 680 - 231 700$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
pythonc++cethernetdspfirmwaresignal processingmicrocontrollersrisc v
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
$155к-232к/год
$150к$160кмедиана$190к
По похожим ролям (50) ~ $160к/год
91
Крутая вакансия
развернуть
Чёткая роль технического лидера в крупной полупроводниковой компании с работой над оптическими DSP для облачной и AI-инфраструктуры; при этом заметная часть задач связана с координацией и общением с заказчиками.
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Много ответственностиСовременный стекИнфраструктура для AIЭкспортные ограничения
Оценка от Hirify AI
Мэтч & Сопровод
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Principal Embedded Firmware Engineer (Networking PAM4 DSP): Leading the architecture, development, and testing of embedded C firmware for RISC-V-based DSP products and optical networking modules with an accent on signal processing, hardware control, and customer-facing product delivery. Focus on guiding firmware development, debugging complex hardware issues, translating MSA/OIF/CMIS specifications, and coordinating cross-functional teams through volume production.
Location: Santa Clara, CA, United States; onsite role. Applicants must be eligible to access U.S. export-controlled technology and software; export license review may apply.
Expected base pay: $154,680–$231,700 per annum, plus eligibility for bonus and equity plans.
Company
hirify.global develops semiconductor solutions and optical digital signal processing products that support enterprise, cloud, AI, carrier, and data-center infrastructure.
What you will do
Lead the architecture, design, development, and testing of embedded C firmware for complex DSP hardware running on a RISC-V-based multicore MCU.
Serve as technical lead for a product and guide 2–8 software developers through development, integration, testing, and production.
Drive firmware development for RX/TX signal processing, FEC, PLL/FLL, reference generation, thermal monitoring, and related DSP control blocks.
Lead reviews of firmware architecture, API design, system integration, and sequence diagrams derived from MSA, OIF, CMIS, and customer specifications.
Resolve difficult hardware and field issues to root cause while coordinating with Hardware, Systems, Test, Validation, QA, Applications Engineering, Marketing, and customer-support teams.
Coordinate milestones, Agile sprint planning, backlog prioritization, customer bring-up, feature delivery, and technical discussions with tier-1 customers.
Experience as a Software Team Lead or Technical Lead on embedded projects.
Experience with architecture design and development, code reviews, testing, and delivery through customer volume production.
Understanding of embedded SoC and microcontroller architecture, memory-mapped hardware interfaces, GPIOs, ISRs, and related concepts; RISC-V experience is advantageous.
Excellent verbal and written communication skills in English and ability to collaborate in a large cross-functional organization.
Strong problem-solving and customer-debugging skills using real hardware in a laboratory environment.
Experience using revision-control and defect-tracking systems.
BS, MS, or PhD in Computer Science, Electrical Engineering, Software Engineering, or a related technical field.
Nice to have
Experience with SERDES, IM-DD or coherent DSP, Ethernet or PCIe PHYs, and optical-module software.
Experience designing, developing, and debugging software state machines, transitions, context saving, and error handling.
Experience with mixed-signal control and monitoring, PID control, and feedback loops.
Experience with bare-metal systems, RTOS, device drivers, or the Linux kernel.
Familiarity with advanced compiler options, preferably Clang or GCC.
Proficiency in C and Python, with knowledge of Git, Linux, makefiles, GDB, IDEs, and Bash.
Familiarity with digital verification flows, FPGA emulation, and hardware languages such as Verilog.
Familiarity with laboratory equipment including oscilloscopes, power supplies, PNAs, and ONTs.
Understanding of Ethernet networking through the OSI model, especially PHY through data-link layers.
Familiarity with forward error correction, PCS framing, PMA/PMD, PRBS, and other PHY traffic schemes.
Understanding of signal-processing concepts including histograms, BER, SNR, sampling phase, Shannon limit, impulse and frequency response, and FFT.
Culture & Benefits
Work on optical DSP products deployed in cloud data centers and AI clusters worldwide.
Collaborate with geographically distributed, cross-functional engineering teams across the full product lifecycle.
Benefits support financial well-being, family support, mental and physical health, and recognition.
Benefits include an employee stock purchase plan with a two-year lookback, family-support programs, mental-health resources, recognition awards, bonus eligibility, and equity plans.
Hiring process
Interviews are intended to assess individual experience, thought process, and communication in real time.
AI tools, transcription apps, automated note-taking bots, and real-time answer generators are prohibited during interviews; unauthorized use may result in disqualification.
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