Principal Embedded Engineer (AI/HPC)

Location: Fully remote for employees residing within the United States; department location is Boston, Massachusetts.

Company

hirify.global develops high-performance scale-out networking solutions integrating hardware, software, and system technologies for AI and HPC datacenters.

What you will do

• Architect and implement bare-metal C firmware on a RISC-V management core to provision, boot, and supervise on-chip acceleration engines.
• Own the secure firmware-loading pipeline, including flash image retrieval, hardware root-of-trust authentication, and verified image distribution through fan-out and DMA hardware.
• Build per-engine bring-up, reset sequencing, health validation, timeout handling, error handling, and security invariants.
• Scale firmware distribution and bring-up across multiple engines and dies, including runtime reboot and in-field firmware updates.
• Define hardware/software contracts with ASIC and RTL teams using datamodel-first workflows and validate firmware with QEMU and automated unit and integration tests.
• Set architecture standards, review designs and code, provide technical leadership, and mentor engineers.

Requirements

• 10+ years of embedded or firmware engineering experience with a track record of software architecture and technical leadership.
• Expert-level C and working Python skills. C++ is a plus.
• Deep experience with bare-metal firmware on constrained cores, including manually managed local memories and low-level bring-up.
• Experience with secure boot, image authentication, and hardware root-of-trust integration.
• Experience programming hardware CSRs and co-designing register-level interfaces with silicon teams.
• Hands-on AI-assisted engineering proficiency and the judgment to validate AI-generated output.

Nice to have

• RISC-V firmware and toolchain experience.
• Firmware orchestration for multicore accelerator arrays.
• Experience with hardware root-of-trust ecosystems such as Caliptra, SHA-2, and signature verification.
• Experience with code-generation toolchains including SystemRDL, Kaitai, and CMake, plus simulator-based co-verification.
• Familiarity with Ultra Ethernet, UALink, and ESUN interconnect standards.
• Background in HPC or AI networking, RDMA, or libfabric.

Culture & Benefits

• Flexible remote work for eligible US-based employees.
• Equity, cash compensation, incentives, and performance-based bonuses may be included in the total rewards package.
• Medical, dental, and vision coverage, disability and life insurance, dependent care FSA, accidental injury insurance, and pet insurance.
• Paid holidays, sick time, bonding leave, pregnancy disability leave, and Open Time Off for regular full-time exempt employees.
• 401(k) plan with company match and collaboration with semiconductor industry partners.