Product Reliability Engineer (AI Hardware)

Location: San Francisco, CA; hybrid schedule with 3 days in the office per week. Relocation assistance is available to new employees. Candidates may need to meet legal status requirements under U.S. export control laws.

Salary: $207K–$365K base pay, plus equity, performance-related bonuses for eligible employees, and benefits.

Company

OpenAI is an AI research and deployment company developing general-purpose artificial intelligence and the hardware and systems required to support advanced AI workloads.

What you will do

• Define reliability requirements and service-life targets for PCB assemblies, compute and networking trays, systems, and integrated racks.
• Lead design-for-reliability reviews, FMEA and physics-of-failure analysis, component derating, and risk-based design improvements.
• Own qualification plans and execute accelerated-life, environmental, workload, screening, and ongoing reliability tests across development and production.
• Analyze life-test and field data using Weibull, acceleration, and statistical reliability models; communicate assumptions, uncertainty, failure rates, and useful-life estimates.
• Lead failure investigations, root-cause analysis, corrective-action verification, supplier evidence reviews, and targeted requalification.
• Coordinate labs, suppliers, manufacturing partners, quality, data center, and engineering teams while improving serviceability, durability, and rack availability.

Requirements

• Hands-on reliability engineering experience with advanced IT hardware such as AI/HPC servers, networking equipment, or storage systems, spanning PCB assemblies, electromechanical assemblies, and integrated racks.
• Experience designing, instrumenting, and executing hardware reliability tests, debugging laboratory failures, and translating results into design or process improvements.
• Understanding of failure mechanisms including solder fatigue, PCB and laminate damage, connector wear, corrosion, and thermal or mechanical degradation.
• Ability to translate mission profiles and failure risks into qualification plans, select defensible sample sizes and stress levels, and explain accelerated-testing assumptions and limitations.
• Experience leading reliability qualification through development and production milestones while balancing samples, lab capacity, schedules, and release evidence.
• Experience working with component suppliers, joint design manufacturers, contract manufacturers, and external test labs.
• Experience applying design for reliability, DFMEA, and physics-of-failure methods across electrical, mechanical, and thermal interfaces.
• Experience with structured failure analysis and corrective action, including methods such as 8D, electrical diagnostics, microscopy, X-ray, cross-section analysis, or specialist failure-analysis labs.
• Ability to analyze reliability and life-test data, including censored data, Weibull distributions, and confidence bounds, using Python, R, JMP, or equivalent statistical software.
• Experience with high-power electronics, dense interconnects, or liquid-cooled hardware, including thermal interfaces, leak integrity, material compatibility, and serviceability.
• Ability to communicate technical findings and uncertainty clearly and distinguish verified root causes and corrective-action effectiveness from hypotheses.

Culture & Benefits

• Hybrid work model with three office days per week in San Francisco.
• Medical, dental, and vision insurance with employer contributions to Health Savings Accounts, plus FSA and dependent-care accounts.
• 401(k) retirement plan with employer match, paid parental and medical leave, paid time off, paid holidays, and paid sick or safe time.
• Mental health and wellness support, employer-paid life and disability coverage, and an annual learning and development stipend.
• Daily office meals, eligible meal-delivery credits, relocation support, charitable donation matching, and wellness stipends.

Hiring process

• More detailed benefits information is provided during the hiring process.
• Background checks are administered in accordance with applicable law.