ASIC Digital Physical Design Engineer (AI)

Location: Bristol, UK; Stockholm, Sweden; Tampere, Finland

Company

hirify.global is a Norwegian fabless semiconductor company developing low-power wireless communication technology for Internet of Things products.

What you will do

• Drive ASIC physical design from floorplanning and voltage-area definition through place-and-route, timing closure, physical verification, signoff, and tape-out.
• Develop power distribution networks and optimize congestion, clock trees, signal integrity, and power integrity.
• Analyze IR drop, electromigration, and reliability issues across operating modes and corners.
• Implement ECOs and late-stage design optimizations while maintaining timing and schedule targets.
• Support silicon bring-up, debug implementation issues, and collaborate with design, architecture, verification, and silicon teams.
• Improve physical design flows, automation scripts, implementation methodologies, and AI-assisted engineering practices.

Requirements

• BSc or MSc in Electronics Engineering or a similar discipline.
• Several years of experience in chip implementation.
• Experience with Synopsys and Cadence IC implementation and signoff tools.
• Experience contributing to flow development and setup.
• Knowledge of scripting languages such as TCL, Perl, Python, or similar.
• Excellent written and verbal English communication skills.

Nice to have

• Experience using AI-assisted tools, AI-driven EDA flows, code or script generation, and debugging assistance.

Culture & Benefits

• Professional and informal working environment with opportunities for continuous skills development.
• Opportunity to work alongside experienced specialists on next-generation semiconductor products.
• Competitive salary with short- and long-term incentive plans.
• Flexible working hours, medical insurance, and family-friendly policies and benefits.
• Background check may be required.