Sr Application Engineer (Digital Implementation & Physical Design)
Контакты
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Malaysia
physical designasiclow power designrtlplace and routetiming closuredigital implementationstatic verification
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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В Company hidden четко описана инженерная роль с работой над передовыми техпроцессами и взаимодействием с заказчиками, но без указанной зарплаты сложно оценить условия оплаты.
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Зарплата не указанаПередовые технологииСильная отрасльПонятные задачи
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Текст:
Hirify AI/Оригинал
TL;DR
Sr Application Engineer (Digital Implementation & Physical Design): Driving customer adoption and execution of digital implementation, physical design, and static verification solutions with an accent on advanced-node PPA optimization, methodology development, and technical leadership. Focus on floor planning, power grid design, place and route, clock tree synthesis, timing closure, and coordinating RTL design teams through successful tapeouts.
Location: Penang, Malaysia
Company
hirify.global develops technology solutions for digital implementation, physical design, static verification, and advanced semiconductor design.
What you will do
Support and drive customer adoption of digital implementation, physical design, and static verification solutions.
Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, and timing closure.
Work on low-power and high-speed designs at advanced technology nodes.
Participate in or lead physical design methodology and flow development.
Collaborate with RTL design teams, hirify.global R&D, and Product Engineering to support successful tapeouts and tool adoption.
Requirements
BS or MS degree in Electrical Engineering or Computer Science.
At least 2 years of hands-on experience in physical design and verification, including experience with 7 nm and below technologies.
Experience with ASIC design flows, hierarchical physical design strategies, methodologies, and deep-submicron technology issues.
Solid knowledge of low-power design.
Ability to work independently, take responsibility for varied technical tasks, and collaborate effectively as a team player.
Good English communication skills required.
Culture & Benefits
Opportunity to work on challenging low-power and high-speed semiconductor designs.
Work alongside customer design teams, R&D, and Product Engineering.
Contribute to technology and methodology development for next-generation physical design.
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