Sr Staff Analog IC Design Engineer (Semiconductor)
Контакты
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
analog layoutmixed signal designpower managementsilicon validationdata convertersanalog ic designmanufacturing testtransistor level designclocking
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Текст:
Hirify AI/Оригинал
TL;DR
Sr Staff Analog IC Design Engineer (Semiconductor): Defining and developing critical analog and mixed-signal subsystems for ultra-low-power semiconductor products with an accent on power management, clocking, data conversion, and advanced-node circuit design. Focus on leading transistor-level implementation, post-layout closure, silicon validation, manufacturing test, and cross-functional technical decisions through production release.
Location: Onsite five days per week in NW Austin, Texas, United States. Current authorization to work in the United States for any employer is required.
Company
hirify.global develops ultra-low-power semiconductor solutions for wearables, medical devices, IoT products, and AI-powered edge applications.
What you will do
Lead block- and chip-level specifications and architectures for analog and mixed-signal subsystems.
Design and verify complex, high-risk circuits at the transistor level across power management, clocking, and data-conversion functions.
Technically supervise layout, extraction, post-layout closure, and cross-block issue resolution.
Define analog/digital interfaces and collaborate with architecture, RTL, verification, physical-design, product, test, applications, and systems teams.
Develop prototype-silicon validation, characterization, and manufacturing-test strategies.
Guide senior engineers, lead design reviews, and drive designs from requirements through production release.
Requirements
BS or MS in Electrical Engineering, Computer Engineering, or a related field.
At least 8 years of analog or mixed-signal IC design experience with multiple completed silicon design cycles.
Demonstrated ownership of complex analog subsystems from specification through production.
Deep transistor-level design and verification expertise in power management, clocking, data converters, or a comparable area.
Strong understanding of analog layout, parasitics, matching, noise, variation, reliability, and advanced-node design constraints.
Current authorization to work in the United States for any employer and willingness to work onsite in NW Austin five days per week.
Nice to have
Ultra-low-power, battery-constrained, or subthreshold circuit-design experience.
Design experience at 22nm or below.
Broad experience across PMU, clocking, and data-converter subsystems.
Experience supporting multiple products or concurrent tapeouts.
Familiarity with MCU, wearable, medical, edge-AI, wireless, or sensor-oriented SoCs.
Culture & Benefits
Opportunity to solve complex power-efficiency problems while remaining close to circuit design.
Architectural influence and ownership across the complete silicon lifecycle.
Opportunity to shape products and the analog engineering team's technical growth.
Cross-functional work across design, research, development, production, product, test, applications, and marketing.
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