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13 дней назад

Physical Design Intern (Semiconductor)

Формат работы
onsite
Тип работы
fulltime
Грейд
trainee
Английский
b2
Страна
Vietnam
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Physical Design Intern (Semiconductor): Implementing and verifying next-generation physical designs for complex SoCs with an accent on block-level layout, timing closure, synthesis, and power analysis. Focus on performing static timing, crosstalk, IR drop, and electromigration analysis, completing physical verification, and implementing engineering change orders.

Location: Da Nang, Vietnam; onsite

Company

Develops semiconductor solutions for enterprise, cloud, AI, and carrier data infrastructure.

What you will do

  • Implement block-level layouts and achieve timing closure for complex SoC designs.
  • Perform static timing, crosstalk, power, IR drop, and electromigration analyses.
  • Carry out synthesis and physical synthesis.
  • Complete physical verification, including LVS, DRC, and ERC.
  • Implement engineering change orders and contribute to next-generation physical design projects.

Requirements

  • Currently enrolled in a Bachelor's degree program in Electrical Engineering, Computer Engineering, or a related field, with expected graduation in 2027.
  • Experience with scripting or programming in Tcl/Tk or Perl.
  • Detail-oriented, self-motivated, and able to work effectively in a team.
  • Good verbal and written English communication skills.

Nice to have

  • Physical design and automatic place-and-route experience with Synopsys, Magma, or Cadence P&R tools.
  • Previous synthesis or static timing analysis experience.

Culture & Benefits

  • Competitive compensation and benefits.
  • Collaborative, transparent, and inclusive work environment.
  • Access to tools and resources supporting professional development.
  • U.S. export control eligibility and potential export license review may be required before employment.

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