Analog Layout Intern

Location: Da Nang, Vietnam

Company

hirify.global develops semiconductor solutions and foundational high-speed SerDes and die-to-die IP for enterprise, cloud, AI, switching, storage, and optical interconnect applications.

What you will do

• Learn analog design and layout flows and the differences between analog layout and digital physical design.
• Create layouts for basic analog cells such as comparators and OTAs in advanced technology nodes.
• Apply device matching, symmetry, shielding, and layout-dependent-effect requirements.
• Support floorplanning, placement, and routing of analog and mixed-signal blocks under experienced engineers' guidance.
• Run DRC, LVS, and antenna physical verification and help resolve issues.
• Work with circuit designers on parasitic awareness, EM/IR considerations, optimization, progress reviews, and documentation.

Requirements

• Currently pursuing a Bachelor's degree in Electronics, Electrical or Telecommunications Engineering, Mechatronics, Computer Engineering, or a related field, with expected graduation in 2027.
• Basic understanding of semiconductor devices, CMOS technology, and electronic circuits.
• Strong analytical and problem-solving skills with attention to detail.
• Motivation to learn analog layout and new technologies and collaborate effectively with a team.
• Good English communication skills.

Nice to have

• Coursework or projects in analog circuits, VLSI, or IC design.
• Familiarity with Cadence Virtuoso, Calibre DRC/LVS, or similar layout and verification tools.
• Basic knowledge of Linux and scripting with Python, Tcl, or SKILL.

Culture & Benefits

• Competitive compensation and benefits.
• Collaborative, transparent, and inclusive work environment.
• Resources and support for professional development and learning.
• Interview candidates may not use AI tools or automated assistance during interviews.
• Access to export-controlled technology may require an export license review under U.S. regulations.