Analog Layout Intern (Semiconductor)

Location: Singapore

Company

hirify.global develops semiconductor solutions for enterprise, cloud and AI, and carrier data infrastructure.

What you will do

• Design the physical layout of high-speed analog-mixed signal circuits.
• Conduct DRC (Design Rule Checking) and LVS (Layout Versus Schematic) verification.
• Learn and apply EDA tools and advanced physical layout techniques.
• Collaborate with the layout team to solve design and verification problems.

Requirements

• Pursuing a bachelor's degree in Computer Science, Electrical Engineering, or a related discipline.
• Solid understanding of semiconductor technology and circuit design principles.
• Proficient written and verbal English communication.
• Strong collaboration and problem-solving skills with a diligent, self-driven work ethic.
• Eligible to access export-controlled technology and software under applicable U.S. export control laws; an export license review may be required.

Nice to have

• Experience with Cadence Virtuoso and Calibre DRC/LVS.

Culture & Benefits

• Competitive compensation and benefits.
• Collaborative, transparent, and inclusive work environment.
• Resources and support for professional growth and development.
• Full-time employment in the Singapore layout team.