Tech Lead, Analog Mixed Signal Layout (AMS)

Location: Ho Chi Minh City, Vietnam

Company

hirify.global provides rack-scale AI infrastructure through purpose-built connectivity solutions integrating CXL, Ethernet, NVLink, PCIe, UALink, and software technologies.

What you will do

• Perform full-custom layout for high-speed SerDes blocks, including RX front-ends, TX drivers, PLLs, CDRs, bias circuits, ADCs, and DACs.
• Design high-frequency layouts with minimized parasitics, shielding, routing symmetry, matching, and noise isolation.
• Floorplan and integrate top-level analog and mixed-signal blocks.
• Collaborate with circuit designers, physical design engineers, and digital implementation teams on schematic intent and analog-digital boundary integration.
• Run DRC, LVS, ERC, PEX, and EM/IR signoff using industry-standard tools.
• Support post-layout simulation by extracting and delivering clean RC parasitic netlists.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or a related field.
• 7+ years of experience in custom analog or mixed-signal layout using deep-submicron or FinFET processes.
• Experience with high-speed SerDes designs, PLLs, ADCs/DACs, and power management units.
• Strong knowledge of matching, differential pairs, guard rings, noise isolation, parasitic reduction, semiconductor physics, CMOS fabrication, and advanced process nodes such as 7nm and below.
• Experience with Virtuoso Layout Editor, Calibre, PVS, StarRC, Quantus, or similar tools.
• Experience with layout debugging and tapeout release processes.

Culture & Benefits

• Flexible working time.
• Annual performance bonus and long-term incentive compensation.
• Annual health check and insurance for the engineer and family.
• Lunch allowance and company trips.
• Inclusive environment welcoming people with diverse backgrounds and experiences.