Staff Engineer, Post-Silicon Validation (RISC-V)

Location: Hybrid, based in Austin, Texas, or Santa Clara, California, United States

Compensation: $100,000–$500,000, including base and variable compensation targets.

Company

Tenstorrent develops AI computing platforms combining RISC-V CPUs, AI accelerators, software, compilers, networking, and semiconductor technologies.

What you will do

• Lead first-silicon bring-up and execute post-silicon validation plans for RISC-V CPU-based SoCs.
• Own validation from first silicon through production readiness.
• Debug issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces.
• Develop and debug bare-metal tests and boot flows, and collaborate on Linux bring-up and driver validation.
• Work with design, pre-silicon verification, firmware, and software teams to resolve hardware/software interaction issues.
• Provide actionable feedback, validate ECOs, and drive fixes for future silicon revisions.

Requirements

• 5+ years of experience in SoC bring-up, post-silicon validation, and silicon debug.
• Strong understanding of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems.
• Hands-on experience debugging complex hardware/software issues with lab tools and low-level software.
• Ability to collaborate closely with RTL, firmware, and software teams.
• Ability to work in a hybrid arrangement based in Austin, Texas, or Santa Clara, California.
• Eligibility to access U.S. export-controlled technology is required; employment may depend on citizenship, permanent residency, or prior license approval.

Nice to have

• Experience with AI accelerators and high-performance computing platforms.
• Experience influencing architecture, validation strategy, or future silicon direction.

Culture & Benefits

• Collaborative environment focused on curiosity and solving complex technical problems.
• Hands-on exposure to RISC-V SoCs, AI accelerators, and high-performance computing platforms.
• End-to-end ownership across the silicon lifecycle.
• Competitive compensation package and benefits.
• Equal opportunity employment.