Назад
Company hidden
10 дней назад

Technology Development Process Engineer (Hybrid Bonding & Advanced Packaging)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Singapore
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Technology Development Process Engineer (Hybrid Bonding & Advanced Packaging) (Semiconductor manufacturing): Developing and integrating hybrid bonding processes for logic, memory, HBM, and 3D heterogeneous integration with an accent on process optimization, bonding yield, alignment, electrical performance, and reliability. Focus on designing DOE studies, solving surface chemistry and defectivity challenges, and qualifying scalable die-to-wafer bonding technologies through advanced metrology and data-driven root cause analysis.

Location: Singapore, Science Park II; moving to the Tampines office starting April 2027

Company

hirify.global develops materials science, engineering, and manufacturing solutions for semiconductor chips and advanced displays.

What you will do

  • Develop and optimize end-to-end hybrid bonding processes, including surface preparation, wet and dry cleaning, plasma activation, dielectric-to-dielectric bonding, Cu-Cu direct bonding, and post-bond annealing.
  • Lead process characterization and DOE studies to establish process windows and improve bond strength, void density, overlay accuracy, Cu oxidation control, and interface quality.
  • Investigate process integration issues involving CMP topography, surface chemistry, contamination, pattern density, thermal budget, wafer or die warpage, and bonding defectivity.
  • Collaborate with equipment, materials, metrology, and integration teams on scalable die-to-wafer hybrid bonding solutions for HBM, logic, and 3D heterogeneous integration.
  • Define characterization methods using optical inspection, IR imaging, SEM, AFM, XPS, contact angle measurement, electrical testing, and reliability evaluation.
  • Engage customers, research institutes, vendors, suppliers, and ecosystem partners while preparing technical reports, patents, publications, and technology roadmaps.

Requirements

  • Bachelor’s, Master’s, or PhD in engineering, materials science, physics, or a related discipline.
  • At least 5 years of semiconductor experience in technology development, process integration, or advanced packaging.
  • Hands-on experience in one or more of advanced packaging, hybrid bonding, CMP, plasma processing, wet cleaning, TSV integration, or process integration.
  • Understanding of hybrid bonding mechanisms and package integration flows.
  • Experience with DOE, JMP or Minitab, and statistical process analysis.
  • Knowledge of reliability, failure analysis, and advanced metrology techniques.

Nice to have

  • Experience supporting HBM, logic, TSV, RDL, or die-to-wafer bonding technologies.

Culture & Benefits

  • Supportive work culture focused on learning, professional development, and innovation.
  • Collaboration with global R&D teams and experts in semiconductor and display technologies.
  • Employee health and wellbeing programs and support for personal and professional growth.
  • Regular full-time employment with no relocation eligibility.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →