System Validation Engineer (RISC-V)

Location: Hsinchu, Taiwan. The role requires the right to work in Taiwan and authorization to access export-controlled technology.

Company

hirify.global develops high-performance RISC-V compute platforms for applications including artificial intelligence, automotive, data centers, mobile devices, and consumer products.

What you will do

• Validate hirify.global RISC-V CPUs using FPGA-based platforms, development boards, and bring-up boards.
• Perform root-cause and failure analysis across CPU hardware and software components.
• Use ILA and JTAG debuggers to troubleshoot and validate FPGA designs.
• Develop failure hypotheses through systematic elimination of potential causes.
• Create and maintain Python-based scripts to automate and improve debug workflows.

Requirements

• Bachelor’s or Master’s degree in Computer Science or Electronics and Communication Engineering.
• Strong understanding of computer architecture and logic design.
• Experience with Verilog logic design and porting designs to FPGA platforms.
• Practical experience with Linux-based operating systems, Python, and BASH scripting.
• Positive attitude, proactive continuous learning, and commitment to high-quality work.
• Right to work in Taiwan and authorization to access export-controlled technology, or eligibility for required export licenses or approvals.

Culture & Benefits

• Exposure to RISC-V processors, the RISC-V software ecosystem, and development boards.
• Learning opportunities for engineers pursuing a career in the RISC-V domain.
• Collaborative and supportive teams focused on innovation and technical excellence.
• Inclusive workplace committed to diversity and equal employment opportunity.