Physical Design Intern (ASIC)

Location: Yokneam, Israel

Company

hirify.global develops semiconductor solutions and custom processor/ASIC technologies for enterprise, cloud, AI, carrier, automotive, 5G/6G, and networking applications.

What you will do

• Implement future routing devices in the switching department.
• Work on physical design and methodology for next-generation processor chips.
• Use industry-standard electronic design automation tools on complex ASIC designs.
• Contribute to designs based on leading-edge CMOS process technology.
• Collaborate within a technical team while developing independent solutions.

Requirements

• Current 3rd- or 4th-year student in electrical engineering or computer science.
• Excellent interpersonal and communication skills.
• Self-management, independent working ability, and strong learning skills.
• Innovative thinking and highly technical, analytical capabilities.
• Applicants must be eligible to access export-controlled technology and software; an export license review may be required for candidates who are not U.S. citizens, lawful permanent residents, or protected individuals.

Nice to have

• Knowledge of logic design and verification.
• Programming experience with Verilog, VHDL, or TCL.
• Experience developing workflow and automation infrastructure.
• Experience with commercial EDA vendors and tools.

Culture & Benefits

• Full-time position in a collaborative, transparent, and inclusive work environment.
• Access to tools and resources for professional growth and development.
• Eligibility for bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
• Competitive compensation and benefits.

Hiring process

• Interviews assess individual experience, thought process, and communication skills in real time.
• AI tools, transcription apps, automated answer generators, and automated note-taking bots are not permitted during interviews.