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5 дней назад

Senior Logic/DSP Design Engineer – Mixed Signal

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Israel
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Senior Logic/DSP Design Engineer – Mixed Signal (RTL/DSP): Developing synthesizable digital logic and DSP algorithms for mixed-signal IP blocks in next-generation FPGA products with an accent on calibration, equalization, timing recovery, and analog-digital interfaces. Focus on designing verification environments, closing timing and power constraints, and debugging silicon behavior against analog measurements.

Location: Haifa, Israel

Company

hirify.global develops programmable logic devices and next-generation FPGA products.

What you will do

  • Design and implement synthesizable RTL for mixed-signal subsystems, including calibration state machines, digital filters, adaptive equalization, clock/data recovery loops, and control logic.
  • Define digital-analog interfaces, calibration flows, and control logic with analog and mixed-signal architecture teams.
  • Perform RTL-to-gate synthesis, timing closure, static timing analysis, and low-power design for mixed-signal digital blocks.
  • Build and maintain block-level Verilog verification environments, including AMS co-simulation and real-number modeling.
  • Support silicon bring-up and laboratory debug by correlating digital behavior with analog measurements.
  • Document architectures and algorithms, participate in design and code reviews, and mentor junior engineers.

Requirements

  • BSc or MSc in Electrical Engineering.
  • 7+ years of experience in digital logic design, including exposure to mixed-signal or DSP projects.
  • Strong RTL design skills in Verilog and experience with synthesis flows.
  • Solid understanding of DSP fundamentals, including filtering, sampling, quantization, and timing recovery.
  • Familiarity with mixed-signal verification methodologies such as AMS simulation, Verilog-AMS, and real-number modeling.

Nice to have

  • Experience with high-speed SerDes, PCIe, DisplayPort, Ethernet, or similar interface standards.
  • Experience with calibration and adaptation algorithms for ADCs, DACs, or equalizers.
  • Familiarity with low-power design techniques and static timing analysis.
  • Experience with analog-digital co-design.

Culture & Benefits

  • Regular employment position.
  • Work on next-generation FPGA and mixed-signal products.
  • Shift 1 schedule in Israel.

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