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Product Failure Analysis Engineer (Semiconductor)

149 100 - 215 925$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Product Failure Analysis Engineer (Semiconductor): Debugging and performing root-cause analysis of yield, reliability, and customer-return failures in FPGA products with an accent on non-destructive electrical fault isolation, circuit/layout analysis, and semiconductor failure analysis. Focus on using EMMI, Laser Voltage Probing, OBIRCH, design analysis tools, and DFT-based fault localization to drive yield and reliability improvements.

Location: San Jose, California, United States

Salary: $149,100–$215,925 USD per year for the Bay Area California region

Company

hirify.global is a pure-play FPGA solutions provider developing programmable technologies for AI, cloud, networking, and edge markets.

What you will do

  • Perform debug and root-cause analysis of yield, reliability, and customer-return failures in FPGA products.
  • Drive electrical verification and fault isolation during product development, yield improvement, and reliability assessments.
  • Define, execute, and interpret non-destructive fault-isolation methods using commercial testers and specialized tools.
  • Use emission microscopy, Laser Voltage Probing, and OBIRCH for electrical fault isolation.
  • Analyze layouts, schematics, and designs, and collaborate with physical failure analysis teams on defect modes.

Requirements

  • Bachelor's degree in Electrical Engineering, Materials Science, Physics, Mechanical Engineering, or a related field.
  • 8+ years of experience in semiconductor failure analysis.
  • 8+ years of experience with layout and design tools such as Virtuoso, Avalon, or SysNav.
  • 8+ years of experience with Laser Voltage Probing, Photo Emission EMMI, and OBIRCH tools.
  • 8+ years of experience with DFT, logic fault localization, and investigations focused on root cause and yield or reliability improvement.
  • Applicants must be eligible for any required U.S. export authorizations.

Nice to have

  • 10+ years of experience in semiconductor failure analysis.
  • Understanding of FPGA architecture and design debug features.
  • Experience with Teradyne Ultraflex testers.
  • Experience with semiconductor packaging failure analysis.

Culture & Benefits

  • Incentive opportunities based on individual and company performance.
  • Collaboration across IC and package design, foundry, product, manufacturing, and reliability engineering teams.
  • Work on programmable technologies for rapidly evolving AI, cloud, networking, and edge markets.

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