Senior/Staff Formal Verification Engineer (AI Semiconductor)

Location: Tel Aviv-Yafo, Tel Aviv District, Israel

Company

hirify.global develops semiconductor-based connectivity solutions and software for rack-scale AI infrastructure, integrating technologies such as CXL, Ethernet, NVLink, PCIe, and UALink.

What you will do

• Own and develop formal verification environments from initial setup through sign-off.
• Define formal verification strategies for complex semiconductor chips supporting large-scale AI clusters.
• Build robust formal environments, analyze RTL designs, and apply advanced techniques to identify corner-case bugs.
• Analyze verification results, investigate failures, and collaborate with designers to resolve issues.
• Work with architecture, design, and design verification teams to identify verification needs and clarify requirements.
• Develop reusable formal functions and properties for use across multiple projects.

Requirements

• Bachelor’s degree in Electrical Engineering or a related technical field.
• At least 4 years of hands-on formal verification experience in the semiconductor industry.
• Deep knowledge of formal verification methodologies, tools, and flows.
• Strong understanding of RTL design and verification principles.
• Experience with industry-standard formal verification tools such as Jasper or VC Formal.
• Strong communication, analytical, and problem-solving skills.

Nice to have

• Experience taking complex blocks or subsystems through the full formal verification lifecycle.
• Experience with SystemVerilog and UVM-based design verification.
• Knowledge of Ethernet, NVLink, UALink, or PCIe networking standards.
• Background in high-speed serial interface verification.

Culture & Benefits

• Opportunity to contribute to a new strategic R&D center in Israel.
• Meaningful product ownership in a newly established engineering site.
• Inclusive environment encouraging applications from people with diverse backgrounds and experiences.