CPU Circuit Design Engineer

TL;DR

CPU Circuit Design Engineer: Designing and optimizing next-generation CPU cores and SoCs at the transistor level with an accent on power, performance, and area (PPA) targets. Focus on implementing complex circuit blocks, performing detailed analysis, and collaborating with cross-functional teams using state-of-the-art EDA tools.

Location: Must be based in Israel (Haifa or Petah-Tikva). This role follows a hybrid work model requiring on-site presence.

Company

A global leader in semiconductor design and manufacturing, responsible for developing advanced CPU architectures and SoC solutions.

What you will do

• Design, analyze, and debug CPU circuits at the transistor level.
• Perform circuit-level implementation and optimization using manual techniques and automation.
• Conduct PPA analysis to drive design trade-offs for IP blocks.
• Participate in design reviews, quality checks, and post-silicon debug support.
• Collaborate with synthesis, RTL, and layout teams to ensure high-quality IP delivery.
• Apply and refine circuit design methodologies and automation flows.

Requirements

• BSc or MSc in Electrical Engineering, Computer Engineering, or a related field.
• Minimum 2 years of experience in VLSI or circuit design.
• Proficiency with industry-standard EDA tools for circuit design, simulation, and debugging.
• Strong analytical and problem-solving skills with the ability to work independently.
• Effective communication skills for working in a multidisciplinary team.
• Must be eligible to work in Israel.

Nice to have

• Experience in memory design or CPU/SoC development.
• Expertise in transistor-level design and power optimization techniques.

Culture & Benefits

• Hybrid work model allowing flexibility between on-site and off-site work.
• Opportunity to work on next-generation CPU architectures with advanced process technologies.
• Collaborative environment with access to state-of-the-art design tools.
• Exposure to real-world design challenges in a fast-paced global organization.