Назад
Company hidden
4 дня назад

Senior/Staff Design Verification Engineer (ASIC)

Π€ΠΎΡ€ΠΌΠ°Ρ‚ Ρ€Π°Π±ΠΎΡ‚Ρ‹
onsite
Π’ΠΈΠΏ Ρ€Π°Π±ΠΎΡ‚Ρ‹
fulltime
Π“Ρ€Π΅ΠΉΠ΄
senior
Английский
b2
Π‘Ρ‚Ρ€Π°Π½Π°
Singapore/Malaysia
Вакансия ΠΈΠ· списка Hirify.GlobalВакансия ΠΈΠ· Hirify Global, списка ΠΌΠ΅ΠΆΠ΄ΡƒΠ½Π°Ρ€ΠΎΠ΄Π½Ρ‹Ρ… tech-ΠΊΠΎΠΌΠΏΠ°Π½ΠΈΠΉ
Для мэтча ΠΈ ΠΎΡ‚ΠΊΠ»ΠΈΠΊΠ° Π½ΡƒΠΆΠ΅Π½ Plus

ΠœΡΡ‚Ρ‡ & Π‘ΠΎΠΏΡ€ΠΎΠ²ΠΎΠ΄

Для мэтча с этой вакансиСй Π½ΡƒΠΆΠ΅Π½ Plus

ОписаниС вакансии

ВСкст:
/

TL;DR

Senior/Staff Design Verification Engineer (ASIC/UVM): Ensuring functional correctness and performance of computer arithmetic IPs through comprehensive verification environments with an accent on coverage-driven verification. Focus on developing formal verification testbenches, implementing complex stimulus, and debugging RTL issues using industry-standard EDA tools.

Location: Singapore / Penang, MY

Company

hirify.global is a world-leading technology company specializing in Bitcoin mining solutions, ASIC chip design, and AI cloud capabilities.

What you will do

  • Develop and implement state-of-the-art verification methodologies using UVM, C/C++, co-simulation, and formal verification.
  • Collaborate with design teams to define and refine verification test plans based on design specifications.
  • Implement test cases, stimulus, and patterns to validate DUT functionality and explore corner cases.
  • Execute simulations and debug RTL issues using waveform analysis and advanced debugging tools.
  • Maintain regression test suites and monitor functional and code coverage metrics for verification closure.
  • Contribute to automation scripts, reusable verification components, and Verification IP (VIP).

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Solid understanding of digital logic design and RTL development using Verilog.
  • Proficiency with AMBA bus protocols (AXI, AHB, APB).
  • Hands-on experience with SystemVerilog, UVM, and formal verification tools (VC Formal or JasperGold).
  • Familiarity with Linux/Unix environments and scripting for automation (Python, Bash, Perl).
  • English: Strong written and verbal communication skills required.

Nice to have

  • Proven track record of contributing to production-grade and silicon-proven IPs.
  • Experience using AI Agents to improve verification productivity.
  • Familiarity with RISC-V processor architecture or CPU verification concepts.
  • Experience with C/C++ programming for testbench development.

Culture & Benefits

  • Inclusive environment with an open workspace and an exciting start-up spirit.
  • Opportunity to network with industrial pioneers and impact the digital asset industry.
  • High level of personal accountability, autonomy, and fast growth opportunities.
  • Attractive welfare benefits, including professional training and mentoring.

Π‘ΡƒΠ΄ΡŒΡ‚Π΅ остороТны: Ссли Ρ€Π°Π±ΠΎΡ‚ΠΎΠ΄Π°Ρ‚Π΅Π»ΡŒ просит Π²ΠΎΠΉΡ‚ΠΈ Π² ΠΈΡ… систСму, ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΡ iCloud/Google, ΠΏΡ€ΠΈΡΠ»Π°Ρ‚ΡŒ ΠΊΠΎΠ΄/ΠΏΠ°Ρ€ΠΎΠ»ΡŒ, Π·Π°ΠΏΡƒΡΡ‚ΠΈΡ‚ΡŒ ΠΊΠΎΠ΄/ПО, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡ‚Π΅ этого - это мошСнники. ΠžΠ±ΡΠ·Π°Ρ‚Π΅Π»ΡŒΠ½ΠΎ ΠΆΠΌΠΈΡ‚Π΅ "ΠŸΠΎΠΆΠ°Π»ΠΎΠ²Π°Ρ‚ΡŒΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡˆΠΈΡ‚Π΅ Π² ΠΏΠΎΠ΄Π΄Π΅Ρ€ΠΆΠΊΡƒ. ΠŸΠΎΠ΄Ρ€ΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β†’