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2 дня назад

IP Logic Design Engineer (Semiconductors)

105 650 - 172 860$
Формат работы
hybrid
Тип работы
fulltime
Грейд
junior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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TL;DR

IP Logic Design Engineer (Semiconductors): Developing and optimizing cutting-edge IP logic designs for high-quality IP blocks and subsystems with an accent on RTL coding, power efficiency, and SoC integration. Focus on optimizing logic designs to meet power, performance, area, and timing goals while ensuring seamless integration into full-chip designs.

Location: Hybrid (Folsom or Santa Clara, California, US)

Salary: $105,650 - $172,860 USD

Company

hirify.global is a global leader in semiconductor innovation, building scalable engineering solutions through its Central Engineering Group (CEG).

What you will do

  • Develop logic design and RTL coding for IP blocks using System Verilog and Verilog.
  • Optimize logic designs to meet power, performance, area (PPA), and timing goals.
  • Participate in defining architecture and microarchitecture features for IP blocks.
  • Collaborate with cross-functional teams to review verification plans and validate design features.
  • Implement power-saving techniques such as clock gating and power gating to enhance energy efficiency.
  • Support SoC customers with the integration and verification of IP blocks to ensure high-quality handoff.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
  • 0 to 1+ years of experience with a Bachelor's degree (or 0 years with a Master's).
  • Proficiency in RTL design and development using System Verilog and Verilog.
  • Hands-on experience with clock design, clock gating, and clock domain crossing.
  • Experience with UPF low-power coding and debugging techniques.
  • Must be based in or able to work in Folsom or Santa Clara, CA under a hybrid model.

Nice to have

  • Master's degree in Electrical Engineering or Computer Engineering.
  • Understanding of microarchitecture design principles and strategies.
  • Strong technical collaboration skills for team environments.

Culture & Benefits

  • Competitive total compensation package including pay and stock bonuses.
  • Comprehensive benefit programs covering health, retirement, and vacation.
  • Hybrid work model allowing employees to split time between on-site and off-site work.

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