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2 дня назад

Test Engineering Director (AI)

169 900 - 254 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
director
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR

Test Engineering Director (AI): Leading the overall test engineering strategy for high-speed IO chiplet-based products with an accent on ATE platform selection, vendor engagement, and outsourced manufacturing test strategy. Focus on architecting scalable ATE IP, managing high-performing engineering teams, and driving continuous improvement in yield and production quality for advanced semiconductor applications.

Location: Must be based in Santa Clara, CA

Salary: $169,900–$254,500 per annum

Company

hirify.global is a leading semiconductor company providing essential data infrastructure solutions across enterprise, cloud, and AI architectures.

What you will do

  • Define and lead the overall test engineering strategy for high-speed and high-power AI applications.
  • Drive strategic partnerships with Tier 1 ATE vendors, OSATs, and instrumentation providers.
  • Lead cross-functional teams across silicon design, package engineering, and manufacturing to develop robust test infrastructure.
  • Architect scalable ATE IP, software frameworks, and automation methodologies for multiple product families.
  • Manage high-performing teams responsible for NPI, silicon characterization, and high-volume manufacturing deployment.
  • Drive continuous improvement initiatives focused on test cost reduction, throughput optimization, and yield improvement.

Requirements

  • Must be eligible to access export-controlled information under U.S. law.
  • Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or related disciplines.
  • 12+ years of experience in semiconductor test engineering, including 6+ years in a leadership role.
  • Proven track record leading cross-functional organizations for NPI and high-volume manufacturing.
  • Strong experience defining ATE architecture and reusable ATE IP platforms.
  • Demonstrated leadership in CAPEX/OPEX planning, resource forecasting, and organizational scaling.

Nice to have

  • Deep experience with high-speed IO and die-to-die interface characterization (PCIe, Serdes, UCIe, HBM, CXL).
  • Hands-on experience with automated test platforms including Advantest 93K and Teradyne UltraFLEX.
  • Strong software development skills in Python, C/C++, and Java.
  • Experience with advanced packaging technologies like MCM, CPC, and CPO.

Culture & Benefits

  • Comprehensive financial well-being programs including an employee stock purchase plan.
  • Robust family support and mental health resources.
  • Recognition and service awards to celebrate contributions.
  • Commitment to professional growth and leadership development.

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