Senior Staff Engineer, Design Verification (Semiconductor)

TL;DR

Senior Staff Engineer, Design Verification (Semiconductor): Developing and maintaining UVM testbench components for complex SoC architectures with an accent on verification strategy, coverage goals, and design quality. Focus on mentoring junior engineers, debugging complex failures, and collaborating with design teams to ensure robust performance in high-performance compute and storage applications.

Location: Must be based in Santa Clara, CA

Salary: $134,390–$201,300 per annum

Company

hirify.global is a leading semiconductor company providing essential data infrastructure solutions for cloud, AI, enterprise, and automotive architectures.

What you will do

• Analyze complex SoC architectures to create comprehensive verification test plans and strategies.
• Develop and maintain UVM testbench components and verification environments.
• Define and execute testing strategies to achieve rigorous coverage goals.
• Debug design failures and collaborate with designers to resolve technical issues.
• Mentor and provide technical guidance to junior verification engineers.

Requirements

• Bachelor’s degree in Computer/Electrical Engineering with 5+ years of experience, or Master’s/PhD with 3+ years of experience.
• Must be eligible to access export-controlled information under U.S. law.
• Proven experience in developing complex verification environments using System Verilog and UVM.
• Proficiency in scripting languages such as Python or Perl and basic C/C++.
• Working knowledge of Linux operating systems and verification bug tracking tools.

Culture & Benefits

• Comprehensive financial well-being programs including an employee stock purchase plan.
• Robust mental health resources and family support programs.
• Recognition and service awards to celebrate professional contributions.
• Commitment to inclusive hiring practices and professional growth.