High Speed Analog Design Engineer (Analog IC)

TL;DR

High Speed Analog Design Engineer (Analog IC): Designing high-performance analog and mixed-signal circuits for USB applications and clocking systems with an accent on high-speed re-drivers, PLLs, and IO designs. Focus on translating chip-level requirements into detailed architectures and performing system-level modeling for noise and transfer functions.

Location: Onsite in Chandler, USA

Company

hirify.global is a global leader in secure connectivity solutions for embedded and automotive applications.

What you will do

• Design high-performance analog and mixed-signal circuits, including high-speed re-drivers, switches for USB, and clocking circuits (PLL).
• Manage the full design cycle from initial concept and simulations to documentation and silicon validation.
• Translate chip-level requirements such as data rate, BER, and Jitter budgets into detailed block architectures and sub-block specifications.
• Develop behavioral models using Verilog-A/AMS and perform system-level modeling with MATLAB/Simulink.
• Collaborate with layout engineers to ensure optimal device placement, EM/IR compliance, shielding, and guard ring implementation.
• Drive technical innovation and present proposed solutions to internal teams and external customers.

Requirements

• MS in Electrical Engineering with 3–5 years of IC development experience, or PhD with 1-2 years of experience.
• Strong expertise in high-speed analog circuit design, signal integrity, jitter analysis, noise, and bandwidth optimization.
• Proven experience with high-speed interfaces (e.g., SerDes, USB, Ethernet) or clocking systems (PLL, CDR).
• Hands-on experience with Cadence IC design tools (Virtuoso, Spectre) and modeling tools like MATLAB/Simulink.
• Must be based in or able to work from the Chandler office.
• Fluency in English (spoken and written) is required.